ARM Skia NEON patches - 40 - arm64: S32A_D565_Opaque
Here are some perf results: +-------+------------+------------+ | count | Cortex-A53 | Cortex-A57 | +-------+------------+------------+ | 1 | -2.54% | -5.39% | +-------+------------+------------+ | 2 | -0.66% | -2.08% | +-------+------------+------------+ | 4 | -11.13% | 0.00% | +-------+------------+------------+ | 8 | -5.79% | -1.30% | +-------+------------+------------+ | 16 | 71.60% | 93.27% | +-------+------------+------------+ | 64 | 30.99% | 57.35% | +-------+------------+------------+ | 256 | 25.41% | 52.59% | +-------+------------+------------+ | 1024 | 25.56% | 53.76% | +-------+------------+------------+ Signed-off-by: Kévin PETIT <kevin.petit@arm.com> BUG=skia: R=mtklein@google.com, djsollen@google.com Author: kevin.petit@arm.com Review URL: https://codereview.chromium.org/346843003
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@ -365,7 +365,98 @@ void S32A_D565_Opaque_neon(uint16_t* SK_RESTRICT dst,
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);
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}
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}
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#endif
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#else // #ifdef SK_CPU_ARM32
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void S32A_D565_Opaque_neon(uint16_t* SK_RESTRICT dst,
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const SkPMColor* SK_RESTRICT src, int count,
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U8CPU alpha, int /*x*/, int /*y*/) {
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SkASSERT(255 == alpha);
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if (count >= 16) {
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asm (
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"movi v4.8h, #0x80 \t\n"
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"1: \t\n"
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"sub %[count], %[count], #16 \t\n"
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"ld1 {v16.8h-v17.8h}, [%[dst]] \t\n"
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"ld4 {v0.16b-v3.16b}, [%[src]], #64 \t\n"
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"prfm pldl1keep, [%[src],#512] \t\n"
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"prfm pldl1keep, [%[dst],#256] \t\n"
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"ushr v20.8h, v17.8h, #5 \t\n"
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"ushr v31.8h, v16.8h, #5 \t\n"
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"xtn v6.8b, v31.8h \t\n"
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"xtn2 v6.16b, v20.8h \t\n"
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"ushr v20.8h, v17.8h, #11 \t\n"
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"shl v19.16b, v6.16b, #2 \t\n"
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"ushr v31.8h, v16.8h, #11 \t\n"
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"xtn v22.8b, v31.8h \t\n"
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"xtn2 v22.16b, v20.8h \t\n"
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"shl v18.16b, v22.16b, #3 \t\n"
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"mvn v3.16b, v3.16b \t\n"
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"xtn v16.8b, v16.8h \t\n"
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"mov v7.16b, v4.16b \t\n"
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"xtn2 v16.16b, v17.8h \t\n"
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"umlal v7.8h, v3.8b, v19.8b \t\n"
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"shl v16.16b, v16.16b, #3 \t\n"
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"mov v22.16b, v4.16b \t\n"
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"ushr v24.8h, v7.8h, #6 \t\n"
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"umlal v22.8h, v3.8b, v18.8b \t\n"
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"ushr v20.8h, v22.8h, #5 \t\n"
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"addhn v20.8b, v22.8h, v20.8h \t\n"
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"cmp %[count], #16 \t\n"
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"mov v6.16b, v4.16b \t\n"
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"mov v5.16b, v4.16b \t\n"
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"umlal v6.8h, v3.8b, v16.8b \t\n"
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"umlal2 v5.8h, v3.16b, v19.16b \t\n"
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"mov v17.16b, v4.16b \t\n"
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"ushr v19.8h, v6.8h, #5 \t\n"
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"umlal2 v17.8h, v3.16b, v18.16b \t\n"
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"addhn v7.8b, v7.8h, v24.8h \t\n"
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"ushr v18.8h, v5.8h, #6 \t\n"
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"ushr v21.8h, v17.8h, #5 \t\n"
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"addhn2 v7.16b, v5.8h, v18.8h \t\n"
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"addhn2 v20.16b, v17.8h, v21.8h \t\n"
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"mov v22.16b, v4.16b \t\n"
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"addhn v6.8b, v6.8h, v19.8h \t\n"
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"umlal2 v22.8h, v3.16b, v16.16b \t\n"
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"ushr v5.8h, v22.8h, #5 \t\n"
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"addhn2 v6.16b, v22.8h, v5.8h \t\n"
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"uqadd v7.16b, v1.16b, v7.16b \t\n"
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"uqadd v20.16b, v2.16b, v20.16b \t\n"
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"uqadd v6.16b, v0.16b, v6.16b \t\n"
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"shll v22.8h, v20.8b, #8 \t\n"
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"shll v5.8h, v7.8b, #8 \t\n"
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"sri v22.8h, v5.8h, #5 \t\n"
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"shll v17.8h, v6.8b, #8 \t\n"
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"shll2 v23.8h, v20.16b, #8 \t\n"
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"shll2 v7.8h, v7.16b, #8 \t\n"
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"sri v22.8h, v17.8h, #11 \t\n"
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"sri v23.8h, v7.8h, #5 \t\n"
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"shll2 v6.8h, v6.16b, #8 \t\n"
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"st1 {v22.8h}, [%[dst]], #16 \t\n"
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"sri v23.8h, v6.8h, #11 \t\n"
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"st1 {v23.8h}, [%[dst]], #16 \t\n"
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"b.ge 1b \t\n"
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: [dst] "+&r" (dst), [src] "+&r" (src), [count] "+&r" (count)
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:: "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
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"v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
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"v31"
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);
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}
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// Leftovers
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if (count > 0) {
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do {
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SkPMColor c = *src++;
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SkPMColorAssert(c);
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if (c) {
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*dst = SkSrcOver32To16(c, *dst);
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}
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dst += 1;
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} while (--count != 0);
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}
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}
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#endif // #ifdef SK_CPU_ARM32
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static inline uint16x8_t SkDiv255Round_neon8(uint16x8_t prod) {
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prod += vdupq_n_u16(128);
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@ -1552,11 +1643,7 @@ const SkBlitRow::Proc sk_blitrow_platform_565_procs_arm_neon[] = {
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// no dither
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S32_D565_Opaque_neon,
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S32_D565_Blend_neon,
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#ifdef SK_CPU_ARM32
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S32A_D565_Opaque_neon,
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#else
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NULL,
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#endif
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S32A_D565_Blend_neon,
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// dither
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