Revert "Reland "add op array32 for indirect uniform access""
This reverts commitfe2506f3ca
. Reason for revert: Breaks unit test on M1 mac Original change's description: > Reland "add op array32 for indirect uniform access" > > This is a reland ofac2d053ccf
> > The original CL was reverted because of a bug in the hash > function. > > Bug=skia:11822 > > Original change's description: > > add op array32 for indirect uniform access > > > > Change-Id: I6249594a2348c7b24e4f057cce2f4e8a6a2c4409 > > Reviewed-on: https://skia-review.googlesource.com/c/skia/+/431676 > > Reviewed-by: Brian Osman <brianosman@google.com> > > Commit-Queue: Herb Derby <herb@google.com> > > Change-Id: I94604f5589c72d342c39cad44540d810ed7f31a1 > Reviewed-on: https://skia-review.googlesource.com/c/skia/+/432797 > Reviewed-by: Brian Osman <brianosman@google.com> > Commit-Queue: Herb Derby <herb@google.com> TBR=herb@google.com,brianosman@google.com,skcq-be@skia-corp.google.com.iam.gserviceaccount.com Change-Id: I3dccc04dc5a867bb45a99044991056b22f5b6fe3 No-Presubmit: true No-Tree-Checks: true No-Try: true Reviewed-on: https://skia-review.googlesource.com/c/skia/+/433278 Reviewed-by: Herb Derby <herb@google.com> Commit-Queue: Herb Derby <herb@google.com>
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@ -233,8 +233,7 @@ namespace skvm {
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z = inst.z,
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w = inst.w;
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int immA = inst.immA,
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immB = inst.immB,
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immC = inst.immC;
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immB = inst.immB;
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switch (op) {
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case Op::assert_true: write(o, op, V{x}, V{y}); break;
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@ -257,7 +256,6 @@ namespace skvm {
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case Op::gather32: write(o, V{id}, "=", op, Ptr{immA}, Hex{immB}, V{x}); break;
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case Op::uniform32: write(o, V{id}, "=", op, Ptr{immA}, Hex{immB}); break;
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case Op::array32: write(o, V{id}, "=", op, Ptr{immA}, Hex{immB}, Hex{immC}); break;
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case Op::splat: write(o, V{id}, "=", op, Splat{immA}); break;
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@ -348,8 +346,7 @@ namespace skvm {
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z = inst.z,
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w = inst.w;
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int immA = inst.immA,
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immB = inst.immB,
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immC = inst.immC;
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immB = inst.immB;
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switch (op) {
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case Op::assert_true: write(o, op, R{x}, R{y}); break;
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@ -372,7 +369,6 @@ namespace skvm {
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case Op::gather32: write(o, R{d}, "=", op, Ptr{immA}, Hex{immB}, R{x}); break;
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case Op::uniform32: write(o, R{d}, "=", op, Ptr{immA}, Hex{immB}); break;
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case Op::array32: write(o, R{d}, "=", op, Ptr{immA}, Hex{immB}, Hex{immC}); break;
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case Op::splat: write(o, R{d}, "=", op, Splat{immA}); break;
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@ -471,8 +467,7 @@ namespace skvm {
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std::vector<OptimizedInstruction> optimized(program.size());
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for (Val id = 0; id < (Val)program.size(); id++) {
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Instruction inst = program[id];
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optimized[id] = {inst.op, inst.x,inst.y,inst.z,inst.w,
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inst.immA,inst.immB,inst.immC,
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optimized[id] = {inst.op, inst.x,inst.y,inst.z,inst.w, inst.immA,inst.immB,
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/*death=*/id, /*can_hoist=*/true};
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}
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@ -545,8 +540,7 @@ namespace skvm {
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&& a.z == b.z
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&& a.w == b.w
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&& a.immA == b.immA
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&& a.immB == b.immB
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&& a.immC == b.immC;
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&& a.immB == b.immB;
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}
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uint32_t InstructionHash::operator()(const Instruction& inst, uint32_t seed) const {
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@ -624,10 +618,6 @@ namespace skvm {
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return {this, push(Op::uniform32, NA,NA,NA,NA, ptr.ix, offset)};
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}
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I32 Builder::array32 (Ptr ptr, int offset, int index) {
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return {this, push(Op::array32, NA,NA,NA,NA, ptr.ix, offset, index)};
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}
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I32 Builder::splat(int n) { return {this, push(Op::splat, NA,NA,NA,NA, n) }; }
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// Be careful peepholing float math! Transformations you might expect to
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@ -2373,6 +2363,7 @@ namespace skvm {
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// Put it all back together, preserving the high 8 bits and low 5.
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inst = ((disp << 5) & (19_mask << 5))
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| ((inst ) & ~(19_mask << 5));
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memcpy(fCode + ref, &inst, 4);
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}
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}
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@ -2490,7 +2481,7 @@ namespace skvm {
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std::vector<llvm::Value*> vals(instructions.size());
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auto emit = [&](size_t i, bool scalar, IRBuilder* b) {
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auto [op, x,y,z,w, immA,immB,immC, death,can_hoist] = instructions[i];
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auto [op, x,y,z,w, immA,immB, death,can_hoist] = instructions[i];
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llvm::Type *i1 = llvm::Type::getInt1Ty (*ctx),
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*i8 = llvm::Type::getInt8Ty (*ctx),
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@ -2994,7 +2985,6 @@ namespace skvm {
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lookup_register(inst.w),
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inst.immA,
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inst.immB,
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inst.immC,
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};
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fImpl->instructions.push_back(pinst);
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};
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@ -3219,8 +3209,7 @@ namespace skvm {
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z = inst.z,
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w = inst.w;
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const int immA = inst.immA,
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immB = inst.immB,
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immC = inst.immC;
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immB = inst.immB;
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// alloc_tmp() returns the first of N adjacent temporary registers,
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// each freed manually with free_tmp() or noted as our result with mark_tmp_as_dst().
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@ -3624,10 +3613,6 @@ namespace skvm {
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case Op::uniform32: a->vbroadcastss(dst(), A::Mem{arg[immA], immB});
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break;
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case Op::array32: a->mov(GP0, A::Mem{arg[immA], immB});
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a->vbroadcastss(dst(), A::Mem{GP0, immC});
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break;
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case Op::index: a->vmovd((A::Xmm)dst(), N);
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a->vbroadcastss(dst(), dst());
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a->vpsubd(dst(), dst(), &iota);
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@ -3900,11 +3885,6 @@ namespace skvm {
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a->ld1r4s(dst(), GP0);
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break;
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case Op::array32: a->add(GP0, arg[immA], immB);
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a->add(GP0, GP0, immC);
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a->ld1r4s(dst(), GP0);
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break;
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case Op::gather8: {
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// As usual, the gather base pointer is immB bytes off of uniform immA.
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a->add (GP0, arg[immA], immB); // GP0 = &(gather base pointer)
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@ -439,7 +439,6 @@ namespace skvm {
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M(index) \
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M(gather8) M(gather16) M(gather32) \
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M(uniform32) \
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M(array32) \
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M(splat) \
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M(add_f32) M(add_i32) \
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M(sub_f32) M(sub_i32) \
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@ -555,9 +554,9 @@ namespace skvm {
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SK_BEGIN_REQUIRE_DENSE
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struct Instruction {
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Op op; // v* = op(x,y,z,w,immA,immB), where * == index of this Instruction.
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Val x,y,z,w; // Enough arguments for Op::store128.
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int immA,immB,immC; // Immediate bit pattern, shift count, pointer index, byte offset, etc.
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Op op; // v* = op(x,y,z,w,immA,immB), where * == index of this Instruction.
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Val x,y,z,w; // Enough arguments for Op::store128.
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int immA,immB; // Immediate bit pattern, shift count, pointer index, byte offset, etc.
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};
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SK_END_REQUIRE_DENSE
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@ -569,7 +568,7 @@ namespace skvm {
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struct OptimizedInstruction {
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Op op;
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Val x,y,z,w;
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int immA,immB,immC;
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int immA,immB;
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Val death;
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bool can_hoist;
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@ -633,9 +632,6 @@ namespace skvm {
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I32 uniform32(Ptr ptr, int offset);
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F32 uniformF (Ptr ptr, int offset) { return pun_to_F32(uniform32(ptr,offset)); }
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// Load i32/f32 uniform with byte-count offset and index.
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I32 array32 (Ptr ptr, int offset, int index);
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// Push and load this color as a uniform.
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Color uniformColor(SkColor4f, Uniforms*);
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@ -940,9 +936,8 @@ namespace skvm {
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}
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private:
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Val push(
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Op op, Val x=NA, Val y=NA, Val z=NA, Val w=NA, int immA=0, int immB=0, int immC=0) {
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return this->push(Instruction{op, x,y,z,w, immA,immB,immC});
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Val push(Op op, Val x=NA, Val y=NA, Val z=NA, Val w=NA, int immA=0, int immB=0) {
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return this->push(Instruction{op, x,y,z,w, immA,immB});
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}
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template <typename T>
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@ -968,7 +963,7 @@ namespace skvm {
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struct InterpreterInstruction {
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Op op;
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Reg d,x,y,z,w;
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int immA,immB,immC;
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int immA,immB;
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};
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class Program {
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@ -93,8 +93,7 @@ namespace SK_OPTS_NS {
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z = inst.z,
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w = inst.w;
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int immA = inst.immA,
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immB = inst.immB,
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immC = inst.immC;
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immB = inst.immB;
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// Ops that interact with memory need to know whether we're stride=1 or K,
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// but all non-memory ops can run the same code no matter the stride.
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@ -217,12 +216,6 @@ namespace SK_OPTS_NS {
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r[d].i32 = *(const int*)( (const char*)args[immA] + immB );
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break;
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CASE(Op::array32):
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const int* ptr;
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memcpy(&ptr, (const uint8_t*)args[immA] + immB, sizeof(ptr));
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r[d].i32 = ptr[immC/sizeof(int)];
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break;
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CASE(Op::splat): r[d].i32 = immA; break;
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CASE(Op::add_f32): r[d].f32 = r[x].f32 + r[y].f32; break;
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@ -769,46 +769,6 @@ DEF_TEST(SkVM_NewOps, r) {
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});
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}
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DEF_TEST(SKVM_array32, r) {
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skvm::Builder b;
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{
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skvm::Ptr buf0 = b.varying<int32_t>(),
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buf1 = b.varying<int32_t>(),
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uniforms = b.uniform();
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skvm::I32 x = b.array32(uniforms, 0, 0);
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b.store32(buf0, x);
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skvm::I32 y = b.array32(uniforms, 0, 4);
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b.store32(buf1, y);
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}
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test_jit_and_interpreter(b, [&](const skvm::Program& program) {
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const int K = 20;
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int i[2] = {3, 7};
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struct {
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int* g;
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} uniforms{i};
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int32_t buf0[K];
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int32_t buf1[K];
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program.eval(K, buf0, buf1, &uniforms);
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for (auto v : buf0) {
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REPORTER_ASSERT(r, v == 3);
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}
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for (auto v : buf1) {
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REPORTER_ASSERT(r, v == 7);
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}
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i[0] = 4;
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program.eval(K, buf0, buf1, &uniforms);
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for (auto v : buf0) {
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REPORTER_ASSERT(r, v == 4);
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}
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for (auto v : buf1) {
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REPORTER_ASSERT(r, v == 7);
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}
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});
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}
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DEF_TEST(SkVM_sqrt, r) {
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skvm::Builder b;
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auto buf = b.varying<int>();
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