Reland "add operator "" _mask() to make Assembler clearer"
This is a reland of 076e5d3a4c
Original change's description:
> add operator "" _mask() to make Assembler clearer
>
> Change-Id: I145f0f60288eef368fc7648b25661356cb6e9f12
> Reviewed-on: https://skia-review.googlesource.com/c/skia/+/223980
> Commit-Queue: Mike Klein <mtklein@google.com>
> Reviewed-by: Herb Derby <herb@google.com>
Change-Id: I10f8301888d83ba186a32c251b25a3fbe297a6a4
Reviewed-on: https://skia-review.googlesource.com/c/skia/+/224183
Reviewed-by: Mike Klein <mtklein@google.com>
Reviewed-by: Herb Derby <herb@google.com>
Commit-Queue: Mike Klein <mtklein@google.com>
This commit is contained in:
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@ -710,12 +710,14 @@ namespace skvm {
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// https://static.docs.arm.com/ddi0596/a/DDI_0596_ARM_a64_instruction_set_architecture.pdf
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static int operator"" _mask(unsigned long long bits) { return (1<<(int)bits)-1; }
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void Assembler::op(uint32_t hi, V m, uint32_t lo, V n, V d) {
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this->word( (hi & 2047) << 21
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| (m & 31) << 16
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| (lo & 63) << 10
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| (n & 31) << 5
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| (d & 31) << 0 );
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this->word( (hi & 11_mask) << 21
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| (m & 5_mask) << 16
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| (lo & 6_mask) << 10
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| (n & 5_mask) << 5
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| (d & 5_mask) << 0);
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}
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void Assembler::and16b(V d, V n, V m) { this->op(0b0'1'0'01110'00'1, m, 0b00011'1, n, d); }
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@ -738,10 +740,10 @@ namespace skvm {
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void Assembler::fmla4s(V d, V n, V m) { this->op(0b0'1'0'01110'0'0'1, m, 0b11001'1, n, d); }
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void Assembler::shift(uint32_t op, int imm, V n, V d) {
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this->word( (op & 4194303) << 10
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| (imm ) << 16 // imm is embedded inside op, bit size depends on op
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| (n & 31) << 5
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| (d & 31) << 0);
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this->word( (op & 22_mask) << 10
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| imm << 16 // imm is embedded inside op, bit size depends on op
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| (n & 5_mask) << 5
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| (d & 5_mask) << 0);
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}
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void Assembler::shl4s(V d, V n, int imm) {
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@ -759,51 +761,51 @@ namespace skvm {
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void Assembler::scvtf4s(V d, V n) {
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this->word(0b0'1'0'01110'0'0'10000'11101'10 << 10
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| (n & 31) << 5
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| (d & 31) << 0);
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| (n & 5_mask) << 5
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| (d & 5_mask) << 0);
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}
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void Assembler::fcvtzs4s(V d, V n) {
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this->word(0b0'1'0'01110'1'0'10000'1101'1'10 << 10
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| (n & 31) << 5
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| (d & 31) << 0);
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| (n & 5_mask) << 5
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| (d & 5_mask) << 0);
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}
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void Assembler::ret(X n) {
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this->word(0b1101011'0'0'10'11111'0000'0'0 << 10
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| (n & 31) << 5);
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| (n & 5_mask) << 5);
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}
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void Assembler::add(X d, X n, int imm12) {
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this->word(0b1'0'0'10001'00 << 22
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| (imm12 & 4095) << 10
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| (n & 31) << 5
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| (d & 31) << 0);
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this->word(0b1'0'0'10001'00 << 22
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| (imm12 & 12_mask) << 10
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| (n & 5_mask) << 5
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| (d & 5_mask) << 0);
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}
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void Assembler::subs(X d, X n, int imm12) {
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this->word( 0b1'1'1'10001'00 << 22
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| (imm12 & 4095) << 10
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| (n & 31) << 5
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| (d & 31) << 0);
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this->word( 0b1'1'1'10001'00 << 22
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| (imm12 & 12_mask) << 10
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| (n & 5_mask) << 5
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| (d & 5_mask) << 0);
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}
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void Assembler::bne(Label l) {
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// Jump in insts from before this one.
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const int imm19 = (l.offset - here().offset) / 4;
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this->word( 0b0101010'0 << 24
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| (imm19 & 524287) << 5
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| 0b0'0001 << 0);
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this->word( 0b0101010'0 << 24
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| (imm19 & 19_mask) << 5
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| 0b0'0001 << 0);
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}
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void Assembler::ldrq(V dst, X src) {
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this->word( 0b00'111'1'01'11'000000000000 << 10
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| (src & 31) << 5
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| (dst & 31) << 0);
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| (src & 5_mask) << 5
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| (dst & 5_mask) << 0);
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}
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void Assembler::strq(V src, X dst) {
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this->word( 0b00'111'1'01'10'000000000000 << 10
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| (dst & 31) << 5
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| (src & 31) << 0);
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| (dst & 5_mask) << 5
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| (src & 5_mask) << 0);
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}
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#if defined(SKVM_JIT)
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