small ABI + narrow/wide code updates
The only tangible effect this CL should have is to use __vectorcall on all Windows builds, including scalar ones. The code generation is a little better there with __vectorcall than not, so might as well. This is a baby step towards vector stages with MSVC, but a very baby step indeed. Mostly this refactors and regroups a bunch of logic to reflect my current thoughts. The BUILD.gn changes are essentially no-ops, but they simplify things and make our flags more similar to how those targets are built in Chromium. (And I cleaned up other /arch: uses so this works.) Change-Id: I73dd39d15cdc7b3d268231a707952bbbfd91496e Reviewed-on: https://skia-review.googlesource.com/115644 Reviewed-by: Herb Derby <herb@google.com> Commit-Queue: Mike Klein <mtklein@chromium.org>
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Mike Klein
Skia Commit-Bot
parent
42409c2efa
commit
4d4b3aaa20
10
BUILD.gn
10
BUILD.gn
@ -303,7 +303,7 @@ opts("sse42") {
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opts("avx") {
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enabled = is_x86
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sources = skia_opts.avx_sources
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if (!is_clang && is_win) {
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if (is_win) {
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cflags = [ "/arch:AVX" ]
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} else {
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cflags = [ "-mavx" ]
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@ -313,14 +313,10 @@ opts("avx") {
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opts("hsw") {
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enabled = is_x86
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sources = skia_opts.hsw_sources
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if (!is_clang && is_win) {
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if (is_win) {
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cflags = [ "/arch:AVX2" ]
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} else {
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cflags = [
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"-mavx2",
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"-mf16c",
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"-mfma",
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]
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cflags = [ "-march=haswell" ]
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}
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# Oddly, clang-cl doesn't recognize this as a valid flag.
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@ -112,9 +112,7 @@ config("default") {
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"-mfpu=neon",
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"-mthumb",
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]
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} else if (current_cpu == "x86" && is_win) {
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cflags += [ "/arch:SSE2" ]
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} else if (current_cpu == "x86") {
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} else if (current_cpu == "x86" && !is_win) {
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asmflags += [ "-m32" ]
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cflags += [
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"-m32",
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@ -700,28 +700,32 @@ static const size_t N = sizeof(F) / sizeof(float);
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// tail != 0 ~~> work on only the first tail pixels
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// tail is always < N.
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// Any custom ABI to use for all non-externally-facing stage functions.
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#if defined(__ARM_NEON) && defined(__arm__)
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// Any custom ABI to use for all (non-externally-facing) stage functions?
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// Also decide here whether to use narrow (compromise) or wide (ideal) stages.
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#if defined(__arm__) && defined(__ARM_NEON)
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// This lets us pass vectors more efficiently on 32-bit ARM.
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// We can still only pass 16 floats, so best as 4x {r,g,b,a}.
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#define ABI __attribute__((pcs("aapcs-vfp")))
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#elif 0 || defined(__clang__) && defined(_MSC_VER)
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// TODO: can we use sysv_abi here instead? It'd allow passing far more registers.
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#define ABI __attribute__((vectorcall))
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#else
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#define ABI
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#endif
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// On 32-bit x86 we've only got 8 xmm registers, so we keep the 4 hottest (r,g,b,a)
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// in registers and the d-registers on the stack (giving us 4 temporary registers).
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// General-purpose registers are also tight, so we put most of those on the stack too.
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//
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// On ARMv7, we do the same so that we can make the r,g,b,a vectors wider.
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//
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// Finally, this narrower stage calling convention also fits Windows' __vectorcall very well.
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#if 0 || defined(__i386__) || defined(_M_IX86) || defined(__arm__) || defined(_MSC_VER)
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#define JUMPER_NARROW_STAGES 1
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#else
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#elif 0 && defined(_MSC_VER) && defined(__clang__) && defined(__x86_64__)
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// SysV ABI makes it very sensible to use wide stages with clang-cl.
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// TODO: crashes during compilation :(
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#define ABI __attribute__((sysv_abi))
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#define JUMPER_NARROW_STAGES 0
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#elif defined(_MSC_VER)
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// Even if not vectorized, this lets us pass {r,g,b,a} as registers,
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// instead of {b,a} on the stack. Narrow stages work best for __vectorcall.
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#define ABI __vectorcall
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#define JUMPER_NARROW_STAGES 1
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#elif defined(__x86_64__) || defined(__aarch64__)
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// These platforms are ideal for wider stages, and their default ABI is ideal.
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#define ABI
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#define JUMPER_NARROW_STAGES 0
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#else
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// 32-bit or unknown... shunt them down the narrow path.
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// Odds are these have few registers and are better off there.
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#define ABI
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#define JUMPER_NARROW_STAGES 1
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#endif
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#if JUMPER_NARROW_STAGES
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@ -767,7 +771,7 @@ static void start_pipeline(size_t dx, size_t dy, size_t xlimit, size_t ylimit, v
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#define STAGE(name, ...) \
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SI void name##_k(__VA_ARGS__, size_t dx, size_t dy, size_t tail, \
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F& r, F& g, F& b, F& a, F& dr, F& dg, F& db, F& da); \
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static ABI void name(Params* params, void** program, \
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static void ABI name(Params* params, void** program, \
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F r, F g, F b, F a) { \
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name##_k(Ctx{program},params->dx,params->dy,params->tail, r,g,b,a, \
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params->dr, params->dg, params->db, params->da); \
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@ -780,7 +784,7 @@ static void start_pipeline(size_t dx, size_t dy, size_t xlimit, size_t ylimit, v
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#define STAGE(name, ...) \
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SI void name##_k(__VA_ARGS__, size_t dx, size_t dy, size_t tail, \
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F& r, F& g, F& b, F& a, F& dr, F& dg, F& db, F& da); \
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static ABI void name(size_t tail, void** program, size_t dx, size_t dy, \
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static void ABI name(size_t tail, void** program, size_t dx, size_t dy, \
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F r, F g, F b, F a, F dr, F dg, F db, F da) { \
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name##_k(Ctx{program},dx,dy,tail, r,g,b,a, dr,dg,db,da); \
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auto next = (Stage)load_and_inc(program); \
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@ -794,9 +798,9 @@ static void start_pipeline(size_t dx, size_t dy, size_t xlimit, size_t ylimit, v
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// just_return() is a simple no-op stage that only exists to end the chain,
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// returning back up to start_pipeline(), and from there to the caller.
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#if JUMPER_NARROW_STAGES
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static ABI void just_return(Params*, void**, F,F,F,F) {}
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static void ABI just_return(Params*, void**, F,F,F,F) {}
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#else
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static ABI void just_return(size_t, void**, size_t,size_t, F,F,F,F, F,F,F,F) {}
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static void ABI just_return(size_t, void**, size_t,size_t, F,F,F,F, F,F,F,F) {}
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#endif
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@ -2375,9 +2379,9 @@ static void start_pipeline(const size_t x0, const size_t y0,
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}
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#if JUMPER_NARROW_STAGES
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static ABI void just_return(Params*, void**, U16,U16,U16,U16) {}
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static void ABI just_return(Params*, void**, U16,U16,U16,U16) {}
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#else
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static ABI void just_return(size_t,void**,size_t,size_t, U16,U16,U16,U16, U16,U16,U16,U16) {}
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static void ABI just_return(size_t,void**,size_t,size_t, U16,U16,U16,U16, U16,U16,U16,U16) {}
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#endif
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// All stages use the same function call ABI to chain into each other, but there are three types:
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@ -2393,7 +2397,7 @@ static void start_pipeline(const size_t x0, const size_t y0,
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#if JUMPER_NARROW_STAGES
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#define STAGE_GG(name, ...) \
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SI void name##_k(__VA_ARGS__, size_t dx, size_t dy, size_t tail, F& x, F& y); \
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static ABI void name(Params* params, void** program, U16 r, U16 g, U16 b, U16 a) { \
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static void ABI name(Params* params, void** program, U16 r, U16 g, U16 b, U16 a) { \
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auto x = join<F>(r,g), \
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y = join<F>(b,a); \
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name##_k(Ctx{program}, params->dx,params->dy,params->tail, x,y); \
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@ -2408,7 +2412,7 @@ static void start_pipeline(const size_t x0, const size_t y0,
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SI void name##_k(__VA_ARGS__, size_t dx, size_t dy, size_t tail, F x, F y, \
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U16& r, U16& g, U16& b, U16& a, \
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U16& dr, U16& dg, U16& db, U16& da); \
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static ABI void name(Params* params, void** program, U16 r, U16 g, U16 b, U16 a) { \
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static void ABI name(Params* params, void** program, U16 r, U16 g, U16 b, U16 a) { \
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auto x = join<F>(r,g), \
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y = join<F>(b,a); \
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name##_k(Ctx{program}, params->dx,params->dy,params->tail, x,y, r,g,b,a, \
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@ -2424,7 +2428,7 @@ static void start_pipeline(const size_t x0, const size_t y0,
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SI void name##_k(__VA_ARGS__, size_t dx, size_t dy, size_t tail, \
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U16& r, U16& g, U16& b, U16& a, \
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U16& dr, U16& dg, U16& db, U16& da); \
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static ABI void name(Params* params, void** program, U16 r, U16 g, U16 b, U16 a) { \
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static void ABI name(Params* params, void** program, U16 r, U16 g, U16 b, U16 a) { \
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name##_k(Ctx{program}, params->dx,params->dy,params->tail, r,g,b,a, \
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params->dr,params->dg,params->db,params->da); \
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auto next = (Stage)load_and_inc(program); \
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@ -2436,7 +2440,7 @@ static void start_pipeline(const size_t x0, const size_t y0,
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#else
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#define STAGE_GG(name, ...) \
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SI void name##_k(__VA_ARGS__, size_t dx, size_t dy, size_t tail, F& x, F& y); \
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static ABI void name(size_t tail, void** program, size_t dx, size_t dy, \
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static void ABI name(size_t tail, void** program, size_t dx, size_t dy, \
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U16 r, U16 g, U16 b, U16 a, \
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U16 dr, U16 dg, U16 db, U16 da) { \
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auto x = join<F>(r,g), \
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@ -2453,7 +2457,7 @@ static void start_pipeline(const size_t x0, const size_t y0,
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SI void name##_k(__VA_ARGS__, size_t dx, size_t dy, size_t tail, F x, F y, \
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U16& r, U16& g, U16& b, U16& a, \
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U16& dr, U16& dg, U16& db, U16& da); \
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static ABI void name(size_t tail, void** program, size_t dx, size_t dy, \
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static void ABI name(size_t tail, void** program, size_t dx, size_t dy, \
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U16 r, U16 g, U16 b, U16 a, \
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U16 dr, U16 dg, U16 db, U16 da) { \
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auto x = join<F>(r,g), \
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@ -2470,7 +2474,7 @@ static void start_pipeline(const size_t x0, const size_t y0,
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SI void name##_k(__VA_ARGS__, size_t dx, size_t dy, size_t tail, \
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U16& r, U16& g, U16& b, U16& a, \
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U16& dr, U16& dg, U16& db, U16& da); \
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static ABI void name(size_t tail, void** program, size_t dx, size_t dy, \
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static void ABI name(size_t tail, void** program, size_t dx, size_t dy, \
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U16 r, U16 g, U16 b, U16 a, \
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U16 dr, U16 dg, U16 db, U16 da) { \
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name##_k(Ctx{program}, dx,dy,tail, r,g,b,a, dr,dg,db,da); \
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