AuroraMiddleware/skia2
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simplify neon shifts

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These still generate vshr/vshl with immediates with both GCC and Clang.

BUG=skia:
GOLD_TRYBOT_URL= https://gold.skia.org/search?issue=2194953002
CQ_INCLUDE_TRYBOTS=master.client.skia:Test-Ubuntu-GCC-GCE-CPU-AVX2-x86_64-Release-SKNX_NO_SIMD-Trybot

Based on https://codereview.chromium.org/2196773002

Review-Url: https://codereview.chromium.org/2194953002
This commit is contained in:
mtklein 2016-07-29 12:28:43 -07:00 committed by Commit bot
parent 6d9a213694
commit 79b59e6a38
1 changed files with 8 additions and 34 deletions
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42
src/opts/SkNx_neon.h
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@ -22,28 +22,6 @@ static inline float32x4_t armv7_vrndmq_f32(float32x4_t v) {
return roundtrip - (float32x4_t)vandq_u32(too_big, (uint32x4_t)vdupq_n_f32(1)); return roundtrip - (float32x4_t)vandq_u32(too_big, (uint32x4_t)vdupq_n_f32(1));
} }
// Well, this is absurd. The shifts require compile-time constant arguments.
#define SHIFT8(op, v, bits) switch(bits) { \
case 1: return op(v, 1); case 2: return op(v, 2); case 3: return op(v, 3); \
case 4: return op(v, 4); case 5: return op(v, 5); case 6: return op(v, 6); \
case 7: return op(v, 7); \
} return fVec
#define SHIFT16(op, v, bits) if (bits < 8) { SHIFT8(op, v, bits); } switch(bits) { \
case 8: return op(v, 8); case 9: return op(v, 9); \
case 10: return op(v, 10); case 11: return op(v, 11); case 12: return op(v, 12); \
case 13: return op(v, 13); case 14: return op(v, 14); case 15: return op(v, 15); \
} return fVec
#define SHIFT32(op, v, bits) if (bits < 16) { SHIFT16(op, v, bits); } switch(bits) { \
case 16: return op(v, 16); case 17: return op(v, 17); case 18: return op(v, 18); \
case 19: return op(v, 19); case 20: return op(v, 20); case 21: return op(v, 21); \
case 22: return op(v, 22); case 23: return op(v, 23); case 24: return op(v, 24); \
case 25: return op(v, 25); case 26: return op(v, 26); case 27: return op(v, 27); \
case 28: return op(v, 28); case 29: return op(v, 29); case 30: return op(v, 30); \
case 31: return op(v, 31); } return fVec
template <> template <>
class SkNx<2, float> { class SkNx<2, float> {
public: public:
@ -204,8 +182,8 @@ public:
SkNx operator - (const SkNx& o) const { return fVec - o.fVec; } SkNx operator - (const SkNx& o) const { return fVec - o.fVec; }
SkNx operator * (const SkNx& o) const { return fVec * o.fVec; } SkNx operator * (const SkNx& o) const { return fVec * o.fVec; }
SkNx operator << (int bits) const { SHIFT16(vshl_n_u16, fVec, bits); } SkNx operator << (int bits) const { return fVec << SkNx(bits).fVec; }
SkNx operator >> (int bits) const { SHIFT16(vshr_n_u16, fVec, bits); } SkNx operator >> (int bits) const { return fVec >> SkNx(bits).fVec; }
static SkNx Min(const SkNx& a, const SkNx& b) { return vmin_u16(a.fVec, b.fVec); } static SkNx Min(const SkNx& a, const SkNx& b) { return vmin_u16(a.fVec, b.fVec); }
@ -235,8 +213,8 @@ public:
SkNx operator - (const SkNx& o) const { return fVec - o.fVec; } SkNx operator - (const SkNx& o) const { return fVec - o.fVec; }
SkNx operator * (const SkNx& o) const { return fVec * o.fVec; } SkNx operator * (const SkNx& o) const { return fVec * o.fVec; }
SkNx operator << (int bits) const { SHIFT16(vshlq_n_u16, fVec, bits); } SkNx operator << (int bits) const { return fVec << SkNx(bits).fVec; }
SkNx operator >> (int bits) const { SHIFT16(vshrq_n_u16, fVec, bits); } SkNx operator >> (int bits) const { return fVec >> SkNx(bits).fVec; }
static SkNx Min(const SkNx& a, const SkNx& b) { return vminq_u16(a.fVec, b.fVec); } static SkNx Min(const SkNx& a, const SkNx& b) { return vminq_u16(a.fVec, b.fVec); }
@ -324,8 +302,8 @@ public:
SkNx operator | (const SkNx& o) const { return fVec | o.fVec; } SkNx operator | (const SkNx& o) const { return fVec | o.fVec; }
SkNx operator ^ (const SkNx& o) const { return fVec ^ o.fVec; } SkNx operator ^ (const SkNx& o) const { return fVec ^ o.fVec; }
SkNx operator << (int bits) const { SHIFT32(vshlq_n_s32, fVec, bits); } SkNx operator << (int bits) const { return fVec << SkNx(bits).fVec; }
SkNx operator >> (int bits) const { SHIFT32(vshrq_n_s32, fVec, bits); } SkNx operator >> (int bits) const { return fVec >> SkNx(bits).fVec; }
SkNx operator == (const SkNx& o) const { return fVec == o.fVec; } SkNx operator == (const SkNx& o) const { return fVec == o.fVec; }
SkNx operator < (const SkNx& o) const { return fVec < o.fVec; } SkNx operator < (const SkNx& o) const { return fVec < o.fVec; }
@ -362,8 +340,8 @@ public:
SkNx operator | (const SkNx& o) const { return fVec | o.fVec; } SkNx operator | (const SkNx& o) const { return fVec | o.fVec; }
SkNx operator ^ (const SkNx& o) const { return fVec ^ o.fVec; } SkNx operator ^ (const SkNx& o) const { return fVec ^ o.fVec; }
SkNx operator << (int bits) const { SHIFT32(vshlq_n_u32, fVec, bits); } SkNx operator << (int bits) const { return fVec << SkNx(bits).fVec; }
SkNx operator >> (int bits) const { SHIFT32(vshrq_n_u32, fVec, bits); } SkNx operator >> (int bits) const { return fVec >> SkNx(bits).fVec; }
SkNx operator == (const SkNx& o) const { return fVec == o.fVec; } SkNx operator == (const SkNx& o) const { return fVec == o.fVec; }
SkNx operator < (const SkNx& o) const { return fVec < o.fVec; } SkNx operator < (const SkNx& o) const { return fVec < o.fVec; }
@ -380,10 +358,6 @@ public:
uint32x4_t fVec; uint32x4_t fVec;
}; };
#undef SHIFT32
#undef SHIFT16
#undef SHIFT8
template<> inline Sk4i SkNx_cast<int32_t, float>(const Sk4f& src) { template<> inline Sk4i SkNx_cast<int32_t, float>(const Sk4f& src) {
return vcvtq_s32_f32(src.fVec); return vcvtq_s32_f32(src.fVec);