remove mul_unorm8/mad_unorm8
I just kind of remembered that if we're doing (xy+x)/256 and x is a destination channel and y is 255-sa, then you can get the +x for free by multiplying by 256-sa instead. (d * (255-sa) + d) (d * (255-sa + 1)) (d * (256-sa) ) Duh. This is a trick we play in a lot of legacy code and I've just now realized it's exactly equivalent to the trick I want to play here... sigh. Folding this math in kind of makes mul/mad_unorm8 moot. Speed's getting good: I32_SWAR: 0.3 ns/px I32 : 0.55 ns/px F32 : 0.8 ns/px RP : 0.8 ns/px Opts : 0.2 ns/px Change-Id: I4d10db51ea80a3258c36e97b6b334ad253804613 Reviewed-on: https://skia-review.googlesource.com/c/skia/+/220708 Reviewed-by: Herb Derby <herb@google.com> Commit-Queue: Mike Klein <mtklein@google.com>
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Mike Klein
Skia Commit-Bot
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821f5e8dfe
@ -566,50 +566,60 @@ r13 = pack r11 r13 16
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store32 arg(1) r13
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I32 8888 over 8888
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10 registers, 20 instructions:
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11 registers, 29 instructions:
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r0 = splat FF (3.5733111e-43)
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loop:
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r1 = load32 arg(0)
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r2 = extract r1 0 r0
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r3 = extract r1 8 r0
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r4 = extract r1 16 r0
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r1 = extract r1 24 r0
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r5 = load32 arg(1)
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r6 = extract r5 0 r0
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r7 = extract r5 8 r0
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r8 = extract r5 16 r0
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r5 = extract r5 24 r0
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r9 = sub_i32 r0 r1
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r6 = mad_unorm8 r6 r9 r2
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r7 = mad_unorm8 r7 r9 r3
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r8 = mad_unorm8 r8 r9 r4
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r9 = mad_unorm8 r5 r9 r1
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r7 = pack r6 r7 8
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r9 = pack r8 r9 8
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r9 = pack r7 r9 16
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store32 arg(1) r9
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I32 (SWAR) 8888 over 8888
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8 registers, 20 instructions:
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r0 = splat FF00FF (2.3418409e-38)
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r1 = splat FF (3.5733111e-43)
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r1 = splat 100 (3.5873241e-43)
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loop:
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r2 = load32 arg(0)
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r3 = extract r2 0 r0
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r2 = extract r2 8 r0
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r4 = load32 arg(1)
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r5 = extract r4 0 r0
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r4 = extract r4 8 r0
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r6 = shr r2 16
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r6 = sub_i32 r1 r6
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r7 = mul_i32 r5 r6
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r7 = add_i32 r7 r5
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r7 = extract r7 8 r0
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r4 = extract r2 8 r0
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r5 = extract r2 16 r0
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r2 = extract r2 24 r0
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r6 = load32 arg(1)
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r7 = extract r6 0 r0
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r8 = extract r6 8 r0
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r9 = extract r6 16 r0
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r6 = extract r6 24 r0
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r10 = sub_i32 r1 r2
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r7 = mul_i32 r7 r10
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r7 = shr r7 8
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r7 = add_i32 r3 r7
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r6 = mul_i32 r4 r6
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r6 = add_i32 r6 r4
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r6 = extract r6 8 r0
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r6 = add_i32 r2 r6
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r6 = pack r7 r6 8
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store32 arg(1) r6
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r8 = mul_i32 r8 r10
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r8 = shr r8 8
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r8 = add_i32 r4 r8
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r9 = mul_i32 r9 r10
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r9 = shr r9 8
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r9 = add_i32 r5 r9
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r10 = mul_i32 r6 r10
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r10 = shr r10 8
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r10 = add_i32 r2 r10
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r8 = pack r7 r8 8
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r10 = pack r9 r10 8
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r10 = pack r8 r10 16
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store32 arg(1) r10
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I32 (SWAR) 8888 over 8888
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8 registers, 21 instructions:
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r0 = splat FF00FF (2.3418409e-38)
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r1 = splat 100 (3.5873241e-43)
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r2 = splat FF00FF00 (-1.7146522e+38)
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loop:
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r3 = load32 arg(0)
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r4 = extract r3 0 r0
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r3 = extract r3 8 r0
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r5 = load32 arg(1)
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r6 = extract r5 0 r0
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r5 = extract r5 8 r0
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r7 = shr r3 16
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r7 = sub_i32 r1 r7
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r6 = mul_i32 r6 r7
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r6 = shr r6 8
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r7 = mul_i32 r5 r7
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r6 = bit_and r6 r0
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r7 = bit_and r7 r2
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r6 = add_i32 r4 r6
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r3 = shl r3 8
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r3 = add_i32 r3 r7
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r3 = bit_or r6 r3
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store32 arg(1) r3
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@ -226,11 +226,6 @@ namespace skvm {
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I32 Builder::shr(I32 x, int bits) { return {this->push(Op::shr, x.id,NA,NA, bits)}; }
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I32 Builder::sra(I32 x, int bits) { return {this->push(Op::sra, x.id,NA,NA, bits)}; }
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I32 Builder::mul_unorm8(I32 x, I32 y) { return {this->push(Op::mul_unorm8, x.id, y.id)}; }
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I32 Builder::mad_unorm8(I32 x, I32 y, I32 z) {
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return {this->push(Op::mad_unorm8, x.id, y.id, z.id)};
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}
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I32 Builder::extract(I32 x, int bits, I32 z) {
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return {this->push(Op::extract, x.id,NA,z.id, bits,0)};
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}
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@ -325,9 +320,6 @@ namespace skvm {
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case Op::shr: write(o, V{id}, "= shr", V{x}, Shift{immy}); break;
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case Op::sra: write(o, V{id}, "= sra", V{x}, Shift{immy}); break;
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case Op::mul_unorm8: write(o, V{id}, "= mul_unorm8", V{x}, V{y} ); break;
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case Op::mad_unorm8: write(o, V{id}, "= mad_unorm8", V{x}, V{y}, V{z}); break;
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case Op::extract: write(o, V{id}, "= extract", V{x}, Shift{immy}, V{z}); break;
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case Op::pack: write(o, V{id}, "= pack", V{x}, V{y}, Shift{immz}); break;
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@ -381,9 +373,6 @@ namespace skvm {
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case Op::shr: write(o, R{d}, "= shr", R{x}, Shift{y.imm}); break;
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case Op::sra: write(o, R{d}, "= sra", R{x}, Shift{y.imm}); break;
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case Op::mul_unorm8: write(o, R{d}, "= mul_unorm8", R{x}, R{y.id} ); break;
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case Op::mad_unorm8: write(o, R{d}, "= mad_unorm8", R{x}, R{y.id}, R{z.id}); break;
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case Op::extract: write(o, R{d}, "= extract", R{x}, Shift{y.imm}, R{z.id}); break;
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case Op::pack: write(o, R{d}, "= pack", R{x}, R{y.id}, Shift{z.imm}); break;
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@ -488,17 +477,6 @@ namespace skvm {
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case Op::shr: vpsrld(r[d], r[x], y.imm); break;
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case Op::sra: vpsrad(r[d], r[x], y.imm); break;
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case Op::mul_unorm8: vpmulld(tmp, r[x], r[y.id]);
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vpaddd (tmp, tmp, r[x]);
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vpsrad (r[d],tmp, 8);
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break;
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case Op::mad_unorm8: vpmulld(tmp, r[x], r[y.id]);
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vpaddd (tmp, tmp, r[x]);
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vpsrad (tmp, tmp, 8);
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vpaddd (r[d],tmp, r[z.id]);
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break;
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case Op::extract: if (y.imm) {
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vpsrld(tmp, r[x], y.imm);
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vandps(r[d], tmp, r[z.id]);
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@ -23,7 +23,6 @@ namespace skvm {
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add_i32, sub_i32, mul_i32,
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bit_and, bit_or, bit_xor,
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shl, shr, sra,
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mul_unorm8, mad_unorm8,
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extract,
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pack,
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to_f32, to_i32,
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@ -86,8 +85,9 @@ namespace skvm {
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I32 load8 (Arg ptr);
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I32 load32(Arg ptr);
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I32 splat(int n);
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F32 splat(float f);
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I32 splat(int n);
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I32 splat(unsigned u) { return this->splat((int)u); }
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F32 splat(float f);
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F32 add(F32 x, F32 y);
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F32 sub(F32 x, F32 y);
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@ -107,15 +107,8 @@ namespace skvm {
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I32 shr(I32 x, int bits);
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I32 sra(I32 x, int bits);
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I32 mul_unorm8(I32 x, I32 y); // (x*y+x)/256, approximating (x*y+127)/255.
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I32 mad_unorm8(I32 x, I32 y, I32 z); // mul_unorm8(x,y) + z
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I32 extract(I32 x, int bits, I32 z); // (x >> bits) & z
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// Interlace bits from x and y as if x | (y << bits),
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// assuming no bits from x and (y << bits) collide with each other, (x & (y << bits)) == 0.
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// (This allows implementation with SSE punpckl?? or NEON vzip.?? instructions.)
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I32 pack(I32 x, I32 y, int bits);
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I32 pack (I32 x, I32 y, int bits); // x | (y << bits)
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F32 to_f32(I32 x);
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I32 to_i32(F32 x);
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@ -132,11 +132,6 @@ namespace SK_OPTS_NS {
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CASE(Op::sra): r(d).i32 = r(x).i32 >> y.imm; break;
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CASE(Op::shr): r(d).u32 = r(x).u32 >> y.imm; break;
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CASE(Op::mul_unorm8):
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r(d).u32 = (r(x).u32 * r(y.id).u32 + r(x).u32)/256 ; break;
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CASE(Op::mad_unorm8):
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r(d).u32 = (r(x).u32 * r(y.id).u32 + r(x).u32)/256 + r(z.id).u32; break;
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CASE(Op::extract): r(d).u32 = (r(x).u32 >> y.imm) & r(z.id).u32; break;
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CASE(Op::pack): r(d).u32 = r(x).u32 | (r(y.id).u32 << z.imm); break;
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@ -109,11 +109,17 @@ SrcoverBuilder_I32::SrcoverBuilder_I32() {
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skvm::I32 dr,dg,db,da;
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load(dst, &dr,&dg,&db,&da);
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skvm::I32 invA = sub(splat(0xff), a);
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r = mad_unorm8(dr, invA, r);
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g = mad_unorm8(dg, invA, g);
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b = mad_unorm8(db, invA, b);
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a = mad_unorm8(da, invA, a);
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// (xy + x)/256 is a good approximation of (xy + 127)/255
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//
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// == (d*(255-a) + d)/256
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// == (d*(255-a+1) )/256
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// == (d*(256-a ) )/256
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skvm::I32 invA = sub(splat(256), a);
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r = add(r, shr(mul(dr, invA), 8));
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g = add(g, shr(mul(dg, invA), 8));
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b = add(b, shr(mul(db, invA), 8));
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a = add(a, shr(mul(da, invA), 8));
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r = pack(r, g, 8);
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b = pack(b, a, 8);
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@ -132,22 +138,23 @@ SrcoverBuilder_I32_SWAR::SrcoverBuilder_I32_SWAR() {
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*ga = extract(rgba, 8, splat(0x00ff00ff));
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};
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auto mul_unorm8_SWAR = [&](skvm::I32 x, skvm::I32 y) {
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// As above, assuming x is two SWAR bytes in lanes 0 and 2, and y is a byte.
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skvm::I32 _255 = splat(0x00ff00ff);
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return extract(add(mul(x, y), x), 8, _255);
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};
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skvm::I32 rb, ga;
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load(src, &rb, &ga);
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skvm::I32 drb, dga;
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load(dst, &drb, &dga);
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skvm::I32 _255 = splat(0xff),
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invA = sub(_255, shr(ga, 16));
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rb = add(rb, mul_unorm8_SWAR(drb, invA));
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ga = add(ga, mul_unorm8_SWAR(dga, invA));
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// Same approximation as above.
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skvm::I32 invA = sub(splat(256),
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shr(ga, 16));
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store32(dst, pack(rb, ga, 8));
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skvm::I32 RB = shr(mul(drb, invA), 8), // 8 high bits of results shifted back down.
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GA = mul(dga, invA); // Keep high bits of results in high lanes.
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RB = bit_and(RB, splat(0x00ff00ff)); // Mask off any low bits remaining.
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GA = bit_and(GA, splat(0xff00ff00)); // Ditto.
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rb = add( rb , RB); // src += dst*invA
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ga = add(shl(ga, 8), GA);
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store32(dst, bit_or(rb,ga));
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}
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