add bsl.16b, cmeq.4s, cmgt.4s
These implement select, eq_i32, lt_i32, and gt_i32 on ARMv8. Change-Id: Ic36dda1cc425ca91700f9b120594e420ea0f560a Reviewed-on: https://skia-review.googlesource.com/c/skia/+/248970 Auto-Submit: Mike Klein <mtklein@google.com> Commit-Queue: Herb Derby <herb@google.com> Reviewed-by: Herb Derby <herb@google.com>
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@ -978,11 +978,15 @@ namespace skvm {
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void Assembler::orr16b(V d, V n, V m) { this->op(0b0'1'0'01110'10'1, m, 0b00011'1, n, d); }
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void Assembler::eor16b(V d, V n, V m) { this->op(0b0'1'1'01110'00'1, m, 0b00011'1, n, d); }
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void Assembler::bic16b(V d, V n, V m) { this->op(0b0'1'0'01110'01'1, m, 0b00011'1, n, d); }
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void Assembler::bsl16b(V d, V n, V m) { this->op(0b0'1'1'01110'01'1, m, 0b00011'1, n, d); }
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void Assembler::add4s(V d, V n, V m) { this->op(0b0'1'0'01110'10'1, m, 0b10000'1, n, d); }
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void Assembler::sub4s(V d, V n, V m) { this->op(0b0'1'1'01110'10'1, m, 0b10000'1, n, d); }
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void Assembler::mul4s(V d, V n, V m) { this->op(0b0'1'0'01110'10'1, m, 0b10011'1, n, d); }
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void Assembler::cmeq4s(V d, V n, V m) { this->op(0b0'1'1'01110'10'1, m, 0b10001'1, n, d); }
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void Assembler::cmgt4s(V d, V n, V m) { this->op(0b0'1'0'01110'10'1, m, 0b0011'0'1, n, d); }
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void Assembler::sub8h(V d, V n, V m) { this->op(0b0'1'1'01110'01'1, m, 0b10000'1, n, d); }
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void Assembler::mul8h(V d, V n, V m) { this->op(0b0'1'0'01110'01'1, m, 0b10011'1, n, d); }
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@ -1885,9 +1889,9 @@ namespace skvm {
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case Op::mul_f32: a->fmul4s(dst(), r[x], r[y]); break;
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case Op::div_f32: a->fdiv4s(dst(), r[x], r[y]); break;
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case Op::mad_f32:
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case Op::mad_f32: // fmla4s is z += x*y
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if (avail & (1<<r[z])) { set_dst(r[z]); a->fmla4s( r[z], r[x], r[y]); }
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else { a->orr16b(tmp(), r[z], r[z]);
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else { a->orr16b(tmp(), r[z], r[z]);
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a->fmla4s(tmp(), r[x], r[y]);
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if(dst() != tmp()) { a->orr16b(dst(), tmp(), tmp()); } }
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break;
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@ -1906,10 +1910,21 @@ namespace skvm {
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case Op::bit_xor : a->eor16b(dst(), r[x], r[y]); break;
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case Op::bit_clear: a->bic16b(dst(), r[x], r[y]); break;
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case Op::select: // bsl16b is x = x ? y : z
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if (avail & (1<<r[x])) { set_dst(r[x]); a->bsl16b( r[x], r[y], r[z]); }
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else { a->orr16b(tmp(), r[x], r[x]);
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a->bsl16b(tmp(), r[y], r[z]);
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if(dst() != tmp()) { a->orr16b(dst(), tmp(), tmp()); } }
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break;
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case Op::shl_i32: a-> shl4s(dst(), r[x], imm); break;
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case Op::shr_i32: a->ushr4s(dst(), r[x], imm); break;
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case Op::sra_i32: a->sshr4s(dst(), r[x], imm); break;
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case Op::eq_i32: a->cmeq4s(dst(), r[x], r[y]); break;
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case Op::lt_i32: a->cmgt4s(dst(), r[y], r[x]); break;
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case Op::gt_i32: a->cmgt4s(dst(), r[x], r[y]); break;
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case Op::extract: if (imm) { a->ushr4s(tmp(), r[x], imm);
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a->and16b(dst(), tmp(), r[y]); }
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else { a->and16b(dst(), r[x], r[y]); }
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@ -132,8 +132,9 @@ namespace skvm {
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// d = op(n,m)
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using DOpNM = void(V d, V n, V m);
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DOpNM and16b, orr16b, eor16b, bic16b,
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DOpNM and16b, orr16b, eor16b, bic16b, bsl16b,
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add4s, sub4s, mul4s,
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cmeq4s, cmgt4s,
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sub8h, mul8h,
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fadd4s, fsub4s, fmul4s, fdiv4s,
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tbl;
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@ -600,13 +600,7 @@ DEF_TEST(SkVM_select, r) {
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b.store32(buf, x);
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}
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#if defined(SK_CPU_ARM64)
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// TODO: missing Op::select for ARMv8?
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test_interpreter_only
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#else
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test_jit_and_interpreter
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#endif
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(r, b.done(), [&](const skvm::Program& program) {
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test_jit_and_interpreter(r, b.done(), [&](const skvm::Program& program) {
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int buf[] = { 0,1,2,3,4,5,6,7,8 };
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program.eval(SK_ARRAY_COUNT(buf), buf);
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for (int i = 0; i < (int)SK_ARRAY_COUNT(buf); i++) {
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@ -990,11 +984,15 @@ DEF_TEST(SkVM_Assembler, r) {
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a.orr16b(A::v4, A::v3, A::v1);
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a.eor16b(A::v4, A::v3, A::v1);
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a.bic16b(A::v4, A::v3, A::v1);
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a.bsl16b(A::v4, A::v3, A::v1);
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a.add4s(A::v4, A::v3, A::v1);
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a.sub4s(A::v4, A::v3, A::v1);
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a.mul4s(A::v4, A::v3, A::v1);
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a.cmeq4s(A::v4, A::v3, A::v1);
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a.cmgt4s(A::v4, A::v3, A::v1);
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a.sub8h(A::v4, A::v3, A::v1);
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a.mul8h(A::v4, A::v3, A::v1);
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@ -1009,11 +1007,15 @@ DEF_TEST(SkVM_Assembler, r) {
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0x64,0x1c,0xa1,0x4e,
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0x64,0x1c,0x21,0x6e,
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0x64,0x1c,0x61,0x4e,
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0x64,0x1c,0x61,0x6e,
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0x64,0x84,0xa1,0x4e,
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0x64,0x84,0xa1,0x6e,
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0x64,0x9c,0xa1,0x4e,
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0x64,0x8c,0xa1,0x6e,
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0x64,0x34,0xa1,0x4e,
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0x64,0x84,0x61,0x6e,
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0x64,0x9c,0x61,0x4e,
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