Revert "Implementing S32A_Opaque_BlitRow32 using v7 neon instructions."
Broke ARM build. git-svn-id: http://skia.googlecode.com/svn/trunk@582 2bbb7eff-a529-9590-31e7-b0007b416f81
This commit is contained in:
agl@chromium.org
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a40390c08b
@ -1,292 +0,0 @@
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/***************************************************************************
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Copyright (c) 2010, Code Aurora Forum. All rights reserved.
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Licensed under the Apache License, Version 2.0 (the "License"); you
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may not use this file except in compliance with the License. You may
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obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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implied. See the License for the specific language governing
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permissions and limitations under the License.
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***************************************************************************/
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.text
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.fpu neon
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.global S32A_Opaque_BlitRow32_neon2
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.func S32A_Opaque_BlitRow32_neon2
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S32A_Opaque_BlitRow32_neon2:
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// extern "C" void S32A_Opaque_BlitRow32_neon2(SkPMColor* SK_RESTRICT dst,
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// const SkPMColor* SK_RESTRICT src,
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// int count, U8CPU alpha);
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// r0 dst
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// r1 src
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// r2 alpha
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//
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// Take advantage of vld4 to work on 8 channels at a time instead of 4 as
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// original neon version.
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//
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// For the bytes that are in the last 8 bytes (len%8) we use none-Neon assembly
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// dst = src + SkAlphaMulQ(dst, SkAlpha255To256(255 - SkGetPackedA32(src)))
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//
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// For the bytes in the middle, we use
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// dst = src + (dst * ((255-a) + (255-a)>>7)) >> 8
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//
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// We also take advantage of the software pipelining, working on the current 8
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// channels while loading the next 8 channels.
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//
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// Some better technique as register buffer can be used for the last 8 bytes...
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//
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PUSH {r4-r11}
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CMP r3,#0xff
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BNE .Lto_exit
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CMP r2,#0
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BLE .Lto_exit
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CMP r2,#24
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BLT .Lless_than_24
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VPUSH {Q4-Q7}
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VMOV.I16 q14,#0xff //;Q4.16 = 255
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//prefix
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vld4.8 {d0, d1, d2, d3}, [r1]! //d0,d1,d2,d3 = sourc rgb(0,1,2,3) A(0,1,2,3)
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//update source ptr but not dst ptr
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vld4.8 {d4, d5, d6, d7}, [r0] //d4,d5,d6,d7 = dst rgb(0,1,2,3) A(0,1,2,3)
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add r3, r0, #32 // minus 16 to pretend the last round
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mov r5, #64
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SUB r2,r2,#8
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.Lloop:
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SUB r2,r2,#16
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VSUBW.U8 q4,q14,d3 //Q4.16 = 255-d3
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//update source ptr but not dst ptr
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//It has to be 24 since we pre-load 8 word for the next rounds
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CMP r2,#16
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VSRA.U16 q4,q4,#7 //Q4 = Q4.16+Q4 >> 7 ; A(0,1,2,3)
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VMOVL.U8 q6,d4 //Q6 = vmovl.u8 d4
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VMOVL.U8 q7,d5 //Q7 = vmovl.u8 d5
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VMOVL.U8 q8,d6 //Q8 = vmovl.u8 d6
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VMOVL.U8 q9,d7 //Q9 = vmovl.u8 d7
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VMUL.I16 q6,q6,q4 //Q6 = Q6 * Q4
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VMUL.I16 q7,q7,q4 //Q7 = Q7 * Q4
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vld4.8 {d20, d21, d22, d23}, [r1]! //d0,d1,d2,d3 = sourc rgb(0,1,2,3) A(0,1,2,3)
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VMUL.I16 q8,q8,q4 //Q8 = Q8 * Q4
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VMUL.I16 q9,q9,q4 //Q9 = Q9 * Q4
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vld4.8 {d24, d25, d26, d27}, [r3] //d4,d5,d6,d7 = dst rgb(0,1,2,3) A(0,1,2,3)
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VSHRN.I16 d4,q6,#8 //d4 = Q6.16 shrn 8
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VSHRN.I16 d5,q7,#8 //d5 = Q7.16 shrn 8
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VSHRN.I16 d6,q8,#8 //d6 = Q8.16 shrn 8
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VSHRN.I16 d7,q9,#8 //d7 = Q9.16 shrn 8
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VADD.I8 d4,d4,d0 //d4 = d4+d0
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VADD.I8 d5,d5,d1 //d5 = d5+d1
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VADD.I8 d6,d6,d2 //d6 = d6+d2
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VADD.I8 d7,d7,d3 //d7 = d7+d3
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vst4.8 {d4, d5, d6, d7}, [r0], r5 //dst rgb(0,1,2,3) A(0,1,2,3) = d4,d5,d6,d7
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//add r0, r0, r5
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//The next 4 words
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// vld4.8 {d20, d21, d22, d23}, [r1]! ;d0,d1,d2,d3 = sourc rgb(0,1,2,3) A(0,1,2,3)
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// ;update source ptr but not dst ptr
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// vld4.8 {d24, d25, d26, d27}, [r0] ;d4,d5,d6,d7 = dst rgb(0,1,2,3) A(0,1,2,3)
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//update source ptr but not dst ptr
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VSUBW.U8 q4,q14,d23 //Q4.16 = 255-d3
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VSRA.U16 q4,q4,#7 //Q4 = Q4.16+Q4 >> 7 ; A(0,1,2,3)
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VMOVL.U8 q6,d24 //Q6 = vmovl.u8 d4
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VMOVL.U8 q7,d25 //Q7 = vmovl.u8 d5
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VMOVL.U8 q8,d26 //Q8 = vmovl.u8 d6
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VMOVL.U8 q9,d27 //Q9 = vmovl.u8 d7
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VMUL.I16 q6,q6,q4 //Q6 = Q6 * Q4
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VMUL.I16 q7,q7,q4 //Q7 = Q7 * Q4
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vld4.8 {d0, d1, d2, d3}, [r1]! //d0,d1,d2,d3 = sourc rgb(0,1,2,3) A(0,1,2,3)
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VMUL.I16 q8,q8,q4 //Q8 = Q8 * Q4
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VMUL.I16 q9,q9,q4 //Q9 = Q9 * Q4
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vld4.8 {d4, d5, d6, d7}, [r0] //d4,d5,d6,d7 = dst rgb(0,1,2,3) A(0,1,2,3)
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VSHRN.I16 d24,q6,#8 //d4 = Q6.16 shrn 8
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VSHRN.I16 d25,q7,#8 //d5 = Q7.16 shrn 8
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VSHRN.I16 d26,q8,#8 //d6 = Q8.16 shrn 8
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VSHRN.I16 d27,q9,#8 //d7 = Q9.16 shrn 8
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VADD.I8 d24,d24,d20 //d4 = d4+d0
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VADD.I8 d25,d25,d21 //d5 = d5+d1
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VADD.I8 d26,d26,d22 //d6 = d6+d2
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VADD.I8 d27,d27,d23 //d7 = d7+d3
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vst4.8 {d24, d25, d26, d27}, [r3], r5 //dst rgb(0,1,2,3) A(0,1,2,3) = d4,d5,d6,d7
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//add r3, r3, r5
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BGE .Lloop
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//postfix:
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//There are 8 words left unprocessed from previous round
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VMOV.I16 q4,#0xff //Q4.16 = 255
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VSUBW.U8 q4,q4,d3 //Q4.16 = 255-d3
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CMP r2,#8
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VSHR.U16 q5,q4,#7 //Q5.16 = Q4 >> 7
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VADD.I16 q4,q4,q5 //Q4 = Q4.16+Q5.16 ; A(0,1,2,3)
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VMOVL.U8 q6,d4 //Q6 = vmovl.u8 d4
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VMOVL.U8 q7,d5 //Q7 = vmovl.u8 d5
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VMOVL.U8 q8,d6 //Q8 = vmovl.u8 d6
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VMOVL.U8 q9,d7 //Q9 = vmovl.u8 d7
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VMUL.I16 q6,q6,q4 //Q6 = Q6 * Q4
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VMUL.I16 q7,q7,q4 //Q7 = Q7 * Q4
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VMUL.I16 q8,q8,q4 //Q8 = Q8 * Q4
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VMUL.I16 q9,q9,q4 //Q9 = Q9 * Q4
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VSHRN.I16 d4,q6,#8 //d4 = Q6.16 shrn 8
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VSHRN.I16 d5,q7,#8 //d5 = Q7.16 shrn 8
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VSHRN.I16 d6,q8,#8 //d6 = Q8.16 shrn 8
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VSHRN.I16 d7,q9,#8 //d7 = Q9.16 shrn 8
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VADD.I8 d4,d4,d0 //d4 = d4+d0
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VADD.I8 d5,d5,d1 //d5 = d5+d1
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VADD.I8 d6,d6,d2 //d6 = d6+d2
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VADD.I8 d7,d7,d3 //d7 = d7+d3
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vst4.8 {d4, d5, d6, d7}, [r0]! //dst rgb(0,1,2,3) A(0,1,2,3) = d4,d5,d6,d7
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.Lless_than_16:
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CMP r2,#8
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BLT .Lless_than_8
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SUB r2,r2,#8
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vld4.8 {d0, d1, d2, d3}, [r1]! //d0,d1,d2,d3 = sourc rgb(0,1,2,3) A(0,1,2,3)
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//update source ptr but not dst ptr
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vld4.8 {d4, d5, d6, d7}, [r0] //d4,d5,d6,d7 = dst rgb(0,1,2,3) A(0,1,2,3)
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VMOV.I16 q4,#0xff //Q4.16 = 255
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VSUBW.U8 q4,q4,d3 //Q4.16 = 255-d3
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CMP r2,#8
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VSHR.U16 q5,q4,#7 //Q5.16 = Q4 >> 7
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VADD.I16 q4,q4,q5 //Q4 = Q4.16+Q5.16 ; A(0,1,2,3)
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VMOVL.U8 q6,d4 //Q6 = vmovl.u8 d4
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VMOVL.U8 q7,d5 //Q7 = vmovl.u8 d5
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VMOVL.U8 q8,d6 //Q8 = vmovl.u8 d6
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VMOVL.U8 q9,d7 //Q9 = vmovl.u8 d7
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VMUL.I16 q6,q6,q4 //Q6 = Q6 * Q4
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VMUL.I16 q7,q7,q4 //Q7 = Q7 * Q4
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VMUL.I16 q8,q8,q4 //Q8 = Q8 * Q4
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VMUL.I16 q9,q9,q4 //Q9 = Q9 * Q4
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VSHRN.I16 d4,q6,#8 //d4 = Q6.16 shrn 8
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VSHRN.I16 d5,q7,#8 //d5 = Q7.16 shrn 8
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VSHRN.I16 d6,q8,#8 //d6 = Q8.16 shrn 8
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VSHRN.I16 d7,q9,#8 //d7 = Q9.16 shrn 8
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VADD.I8 d4,d4,d0 //d4 = d4+d0
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VADD.I8 d5,d5,d1 //d5 = d5+d1
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VADD.I8 d6,d6,d2 //d6 = d6+d2
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VADD.I8 d7,d7,d3 //d7 = d7+d3
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vst4.8 {d4, d5, d6, d7}, [r0]! //dst rgb(0,1,2,3) A(0,1,2,3) = d4,d5,d6,d7
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//It will be guaranteed to be less than 8
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//BGE loop
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.Lless_than_8:
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VPOP {Q4-Q7}
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.Lless_than_4:
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SUBS r4,r2,#1
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BMI .Lto_exit // S32A_Opaque_BlitRow32_neon2 + 268
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MOV r8,#0xff
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MVN r10,#0xff00
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ORR r9,r8,r8,LSL #16
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LSL r11,r9,#8
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.Lresidual_loop:
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LDR r3,[r1,#0]
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LDR r12,[r0,#0]
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ADD r1,r1,#4
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SUB r2,r8,r3,LSR #24
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AND r5,r12,r9
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CMP r2,r2
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ADD r2,r2,#1
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AND r12,r10,r12,LSR #8
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STRNE r6,[r7,#0xeef]
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MUL r5,r5,r2
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MUL r2,r12,r2
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STRNE r6,[r7,#0xeef]
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SUBS r4,r4,#1
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AND r12,r9,r5,LSR #8
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AND r2,r2,r11
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ORR r2,r2,r12
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ADD r2,r2,r3
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STR r2,[r0],#4
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BPL .Lresidual_loop // S32A_Opaque_BlitRow32_neon2 + 192
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.Lto_exit:
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POP {r4-r11}
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BX lr
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.Lless_than_24:
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CMP r2,#8
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BLT .Lless_than_4
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.Lloop_8:
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SUB r2,r2,#8
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// We already read the 8 words from the previous pipe line
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vld4.8 {d0, d1, d2, d3}, [r1]! //d0,d1,d2,d3 = sourc rgb(0,1,2,3) A(0,1,2,3)
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//update source ptr but not dst ptr
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vld4.8 {d4, d5, d6, d7}, [r0] //d4,d5,d6,d7 = dst rgb(0,1,2,3) A(0,1,2,3)
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VMOV.I16 q10,#0xff //Q4.16 = 255
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VSUBW.U8 q10,q10,d3 //Q4.16 = 255-d3
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CMP r2,#8
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VSHR.U16 q11,q10,#7 //Q5.16 = Q4 >> 7
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VADD.I16 q10,q10,q11 //Q4 = Q4.16+Q5.16 ; A(0,1,2,3)
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VMOVL.U8 q12,d4 //Q6 = vmovl.u8 d4
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VMOVL.U8 q13,d5 //Q7 = vmovl.u8 d5
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VMOVL.U8 q8,d6 //Q8 = vmovl.u8 d6
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VMOVL.U8 q9,d7 //Q9 = vmovl.u8 d7
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VMUL.I16 q12,q12,q10 //Q6 = Q6 * Q4
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VMUL.I16 q13,q13,q10 //Q7 = Q7 * Q4
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VMUL.I16 q8,q8,q10 //Q8 = Q8 * Q4
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VMUL.I16 q9,q9,q10 //Q9 = Q9 * Q4
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VSHRN.I16 d4,q12,#8 //d4 = Q6.16 shrn 8
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VSHRN.I16 d5,q13,#8 //d5 = Q7.16 shrn 8
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VSHRN.I16 d6,q8,#8 //d6 = Q8.16 shrn 8
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VSHRN.I16 d7,q9,#8 //d7 = Q9.16 shrn 8
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VADD.I8 d4,d4,d0 //d4 = d4+d0
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VADD.I8 d5,d5,d1 //d5 = d5+d1
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VADD.I8 d6,d6,d2 //d6 = d6+d2
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VADD.I8 d7,d7,d3 //d7 = d7+d3
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vst4.8 {d4, d5, d6, d7}, [r0]! //dst rgb(0,1,2,3) A(0,1,2,3) = d4,d5,d6,d7
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BGE .Lloop_8
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B .Lless_than_4
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.endfunc
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.size S32A_Opaque_BlitRow32_neon2, .-S32A_Opaque_BlitRow32_neon2
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@ -431,9 +431,6 @@ static void S32_D565_Blend_Dither_neon(uint16_t *dst, const SkPMColor *src,
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///////////////////////////////////////////////////////////////////////////////
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#if defined(__ARM_HAVE_NEON) && defined(SK_CPU_LENDIAN)
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extern "C" void S32A_Opaque_BlitRow32_neon2(SkPMColor* SK_RESTRICT dst,
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const SkPMColor* SK_RESTRICT src,
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int count, U8CPU alpha);
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static void S32A_Opaque_BlitRow32_neon(SkPMColor* SK_RESTRICT dst,
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const SkPMColor* SK_RESTRICT src,
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@ -557,7 +554,7 @@ static void S32A_Opaque_BlitRow32_neon(SkPMColor* SK_RESTRICT dst,
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}
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}
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#define S32A_Opaque_BlitRow32_PROC S32A_Opaque_BlitRow32_neon2
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#define S32A_Opaque_BlitRow32_PROC S32A_Opaque_BlitRow32_neon
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#else
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#define S32A_Opaque_BlitRow32_PROC NULL
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#endif
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