Add Neon versions of memset32 and memset16
Patch by pgalizia (of codeaurora.org) (Note: I don't read ARM and I didn't manage to find a reviewer for the ARM assembly code so this is landing somewhat unreviewed.) http://codereview.appspot.com/1157045/show git-svn-id: http://skia.googlecode.com/svn/trunk@573 2bbb7eff-a529-9590-31e7-b0007b416f81
This commit is contained in:
agl@chromium.org
parent
268013bfa6
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aab4090b57
152
src/opts/memset16_neon.S
Normal file
152
src/opts/memset16_neon.S
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@ -0,0 +1,152 @@
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/***************************************************************************
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Copyright (c) 2009,2010, Code Aurora Forum. All rights reserved.
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Licensed under the Apache License, Version 2.0 (the "License"); you
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may not use this file except in compliance with the License. You may
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obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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implied. See the License for the specific language governing
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permissions and limitations under the License.
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***************************************************************************/
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/***************************************************************************
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Neon memset: Attempts to do a memset with Neon registers if possible,
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Inputs:
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s: The buffer to write to
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c: The integer data to write to the buffer
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n: The size_t count.
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Outputs:
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***************************************************************************/
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.code 32
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.fpu neon
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.align 4
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.globl memset16_neon
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.func
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memset16_neon:
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cmp r2, #0
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bxeq lr
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/* Keep in mind that r2 -- the count argument -- is for the
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* number of 16-bit items to copy.
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*/
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lsl r2, r2, #1
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push {r0}
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/* If we have < 8 bytes, just do a quick loop to handle that */
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cmp r2, #8
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bgt memset_gt4
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memset_smallcopy_loop:
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strh r1, [r0], #2
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subs r2, r2, #2
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bne memset_smallcopy_loop
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memset_smallcopy_done:
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pop {r0}
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bx lr
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memset_gt4:
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/*
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* Duplicate the r1 lowest 16-bits across r1. The idea is to have
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* a register with two 16-bit-values we can copy. We do this by
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* duplicating lowest 16-bits of r1 to upper 16-bits.
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*/
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orr r1, r1, r1, lsl #16
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/*
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* If we're copying > 64 bytes, then we may want to get
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* onto a 16-byte boundary to improve speed even more.
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*/
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cmp r2, #64
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blt memset_route
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ands r12, r0, #0xf
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beq memset_route
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/*
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* Determine the number of bytes to move forward to get to the 16-byte
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* boundary. Note that this will be a multiple of 4, since we
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* already are word-aligned.
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*/
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rsb r12, r12, #16
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sub r2, r2, r12
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lsls r12, r12, #29
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strmi r1, [r0], #4
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strcs r1, [r0], #4
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strcs r1, [r0], #4
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lsls r12, r12, #2
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strcsh r1, [r0], #2
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memset_route:
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/*
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* Decide where to route for the maximum copy sizes. Note that we
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* build q0 and q1 depending on if we'll need it, so that's
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* interwoven here as well.
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*/
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vdup.u32 d0, r1
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cmp r2, #16
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blt memset_8
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vmov d1, d0
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cmp r2, #64
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blt memset_16
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vmov q1, q0
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cmp r2, #128
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blt memset_32
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memset_128:
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mov r12, r2, lsr #7
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memset_128_loop:
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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subs r12, r12, #1
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bne memset_128_loop
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ands r2, r2, #0x7f
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beq memset_end
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memset_32:
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movs r12, r2, lsr #5
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beq memset_16
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memset_32_loop:
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subs r12, r12, #1
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vst1.64 {q0, q1}, [r0]!
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bne memset_32_loop
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ands r2, r2, #0x1f
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beq memset_end
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memset_16:
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movs r12, r2, lsr #4
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beq memset_8
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memset_16_loop:
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subs r12, r12, #1
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vst1.32 {q0}, [r0]!
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bne memset_16_loop
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ands r2, r2, #0xf
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beq memset_end
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/*
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* memset_8 isn't a loop, since we try to do our loops at 16
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* bytes and above. We should loop there, then drop down here
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* to finish the <16-byte versions. Same for memset_4 and
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* memset_1.
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*/
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memset_8:
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cmp r2, #8
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blt memset_4
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subs r2, r2, #8
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vst1.32 {d0}, [r0]!
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memset_4:
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cmp r2, #4
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blt memset_2
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subs r2, r2, #4
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str r1, [r0], #4
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memset_2:
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cmp r2, #0
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ble memset_end
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strh r1, [r0], #2
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memset_end:
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pop {r0}
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bx lr
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.endfunc
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.end
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122
src/opts/memset32_neon.S
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122
src/opts/memset32_neon.S
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@ -0,0 +1,122 @@
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/***************************************************************************
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Copyright (c) 2009,2010, Code Aurora Forum. All rights reserved.
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Licensed under the Apache License, Version 2.0 (the "License"); you
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may not use this file except in compliance with the License. You may
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obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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implied. See the License for the specific language governing
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permissions and limitations under the License.
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***************************************************************************/
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.code 32
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.fpu neon
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.align 4
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.globl memset32_neon
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.func
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/* r0 = buffer, r1 = value, r2 = times to write */
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memset32_neon:
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cmp r2, #1
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streq r1, [r0], #4
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bxeq lr
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cmp r2, #4
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bgt memset32_neon_start
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cmp r2, #0
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bxeq lr
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memset32_neon_small:
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str r1, [r0], #4
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subs r2, r2, #1
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bne memset32_neon_small
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bx lr
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memset32_neon_start:
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cmp r2, #16
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blt memset32_dropthru
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vdup.32 q0, r1
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vmov q1, q0
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cmp r2, #32
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blt memset32_16
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cmp r2, #64
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blt memset32_32
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cmp r2, #128
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blt memset32_64
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memset32_128:
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movs r12, r2, lsr #7
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memset32_loop128:
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subs r12, r12, #1
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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bne memset32_loop128
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ands r2, r2, #0x7f
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bxeq lr
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memset32_64:
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movs r12, r2, lsr #6
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beq memset32_32
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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ands r2, r2, #0x3f
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bxeq lr
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memset32_32:
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movs r12, r2, lsr #5
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beq memset32_16
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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ands r2, r2, #0x1f
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bxeq lr
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memset32_16:
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movs r12, r2, lsr #4
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beq memset32_dropthru
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and r2, r2, #0xf
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vst1.64 {q0, q1}, [r0]!
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vst1.64 {q0, q1}, [r0]!
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memset32_dropthru:
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rsb r2, r2, #15
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add pc, pc, r2, lsl #2
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nop
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str r1, [r0, #56]
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str r1, [r0, #52]
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str r1, [r0, #48]
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str r1, [r0, #44]
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str r1, [r0, #40]
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str r1, [r0, #36]
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str r1, [r0, #32]
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str r1, [r0, #28]
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str r1, [r0, #24]
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str r1, [r0, #20]
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str r1, [r0, #16]
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str r1, [r0, #12]
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str r1, [r0, #8]
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str r1, [r0, #4]
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str r1, [r0, #0]
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bx lr
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.endfunc
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.end
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45
src/opts/opts_check_arm_neon.cpp
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45
src/opts/opts_check_arm_neon.cpp
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@ -0,0 +1,45 @@
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/***************************************************************************
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Copyright (c) 2010, Code Aurora Forum. All rights reserved.
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Licensed under the Apache License, Version 2.0 (the "License"); you
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may not use this file except in compliance with the License. You may
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obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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implied. See the License for the specific language governing
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permissions and limitations under the License.
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***************************************************************************/
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#include "SkUtils.h"
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extern "C" void memset16_neon(uint16_t dst[], uint16_t value, int count);
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extern "C" void memset32_neon(uint32_t dst[], uint32_t value, int count);
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static inline bool hasNeonRegisters() {
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#if defined(__ARM_HAVE_NEON) && defined(SK_CPU_LENDIAN)
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return true;
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#else
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return false;
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#endif
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}
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SkMemset16Proc SkMemset16GetPlatformProc() {
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if (hasNeonRegisters()) {
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return memset16_neon;
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} else {
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return NULL;
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}
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}
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SkMemset32Proc SkMemset32GetPlatformProc() {
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if (hasNeonRegisters()) {
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return memset32_neon;
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} else {
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return NULL;
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}
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}
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