4x library for NEON
CQ_EXTRA_TRYBOTS=client.skia.android:Test-Android-Nexus5-Adreno330-Arm7-Debug-Trybot BUG=skia: Review URL: https://codereview.chromium.org/975303003
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msarett
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@ -6,6 +6,8 @@
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#define SK4X_PREAMBLE 1
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#if SK_CPU_SSE_LEVEL >= SK_CPU_SSE_LEVEL_SSE2
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#include "Sk4x_sse.h"
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#elif defined(SK_ARM_HAS_NEON)
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#include "Sk4x_neon.h"
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#else
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#include "Sk4x_portable.h"
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#endif
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@ -81,6 +83,8 @@ private:
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#define SK4X_PRIVATE 1
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#if SK_CPU_SSE_LEVEL >= SK_CPU_SSE_LEVEL_SSE2
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#include "Sk4x_sse.h"
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#elif defined(SK_ARM_HAS_NEON)
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#include "Sk4x_neon.h"
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#else
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#include "Sk4x_portable.h"
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#endif
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@ -89,6 +93,8 @@ private:
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#if SK_CPU_SSE_LEVEL >= SK_CPU_SSE_LEVEL_SSE2
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#include "Sk4x_sse.h"
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#elif defined(SK_ARM_HAS_NEON)
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#include "Sk4x_neon.h"
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#else
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#include "Sk4x_portable.h"
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#endif
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220
src/core/Sk4x_neon.h
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220
src/core/Sk4x_neon.h
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@ -0,0 +1,220 @@
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// It is important _not_ to put header guards here.
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// This file will be intentionally included three times.
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#if defined(SK4X_PREAMBLE)
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#include <arm_neon.h>
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// Template metaprogramming to map scalar types to vector types.
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template <typename T> struct SkScalarToSIMD;
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template <> struct SkScalarToSIMD<float> { typedef float32x4_t Type; };
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template <> struct SkScalarToSIMD<int32_t> { typedef int32x4_t Type; };
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#elif defined(SK4X_PRIVATE)
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Sk4x(float32x4_t);
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Sk4x(int32x4_t);
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typename SkScalarToSIMD<T>::Type fVec;
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#else
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// Vector Constructors
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//template <> inline Sk4f::Sk4x(int32x4_t v) : fVec(vcvtq_f32_s32(v)) {}
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template <> inline Sk4f::Sk4x(float32x4_t v) : fVec(v) {}
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template <> inline Sk4i::Sk4x(int32x4_t v) : fVec(v) {}
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//template <> inline Sk4i::Sk4x(float32x4_t v) : fVec(vcvtq_s32_f32(v)) {}
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// Generic Methods
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template <typename T> Sk4x<T>::Sk4x() {}
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template <typename T> Sk4x<T>::Sk4x(const Sk4x& other) { *this = other; }
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template <typename T> Sk4x<T>& Sk4x<T>::operator=(const Sk4x<T>& other) {
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fVec = other.fVec;
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return *this;
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}
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// Sk4f Methods
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#define M(...) template <> inline __VA_ARGS__ Sk4f::
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M() Sk4x(float v) : fVec(vdupq_n_f32(v)) {}
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M() Sk4x(float a, float b, float c, float d) {
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// NEON lacks an intrinsic to make this easy. It is recommended to avoid
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// this constructor unless it is absolutely necessary.
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// I am choosing to use the set lane intrinsics. Particularly, in the case
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// of floating point, it is likely that the values are already in the right
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// register file, so this may be the best approach. However, I am not
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// certain that this is the fastest approach and experimentation might be
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// useful.
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fVec = vsetq_lane_f32(a, fVec, 0);
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fVec = vsetq_lane_f32(b, fVec, 1);
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fVec = vsetq_lane_f32(c, fVec, 2);
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fVec = vsetq_lane_f32(d, fVec, 3);
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}
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// As far as I can tell, it's not possible to provide an alignment hint to
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// NEON using intrinsics. However, I think it is possible at the assembly
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// level if we want to get into that.
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// TODO: Write our own aligned load and store.
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M(Sk4f) Load (const float fs[4]) { return vld1q_f32(fs); }
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M(Sk4f) LoadAligned(const float fs[4]) { return vld1q_f32(fs); }
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M(void) store (float fs[4]) const { vst1q_f32(fs, fVec); }
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M(void) storeAligned(float fs[4]) const { vst1q_f32 (fs, fVec); }
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template <>
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M(Sk4i) reinterpret<Sk4i>() const { return vreinterpretq_s32_f32(fVec); }
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template <>
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M(Sk4i) cast<Sk4i>() const { return vcvtq_s32_f32(fVec); }
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// We're going to skip allTrue(), anyTrue(), and bit-manipulators
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// for Sk4f. Code that calls them probably does so accidentally.
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// Ask msarett or mtklein to fill these in if you really need them.
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M(Sk4f) add (const Sk4f& o) const { return vaddq_f32(fVec, o.fVec); }
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M(Sk4f) subtract(const Sk4f& o) const { return vsubq_f32(fVec, o.fVec); }
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M(Sk4f) multiply(const Sk4f& o) const { return vmulq_f32(fVec, o.fVec); }
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M(Sk4f) divide (const Sk4f& o) const {
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float32x4_t est0 = vrecpeq_f32(o.fVec);
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float32x4_t est1 = vmulq_f32(vrecpsq_f32(est0, o.fVec), est0);
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float32x4_t est2 = vmulq_f32(vrecpsq_f32(est1, o.fVec), est1);
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return vmulq_f32(est2, fVec);
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}
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M(Sk4f) rsqrt() const {
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float32x4_t est0 = vrsqrteq_f32(fVec);
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float32x4_t est1 = vmulq_f32(vrsqrtsq_f32(fVec, vmulq_f32(est0, est0)), est0);
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float32x4_t est2 = vmulq_f32(vrsqrtsq_f32(fVec, vmulq_f32(est1, est1)), est1);
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return est2;
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}
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M(Sk4f) sqrt() const { return this->multiply(this->rsqrt()); }
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M(Sk4i) equal (const Sk4f& o) const { return vreinterpretq_s32_u32(vceqq_f32(fVec, o.fVec)); }
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M(Sk4i) notEqual (const Sk4f& o) const { return vreinterpretq_s32_u32(vmvnq_u32(vceqq_f32(fVec, o.fVec))); }
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M(Sk4i) lessThan (const Sk4f& o) const { return vreinterpretq_s32_u32(vcltq_f32(fVec, o.fVec)); }
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M(Sk4i) greaterThan (const Sk4f& o) const { return vreinterpretq_s32_u32(vcgtq_f32(fVec, o.fVec)); }
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M(Sk4i) lessThanEqual (const Sk4f& o) const { return vreinterpretq_s32_u32(vcleq_f32(fVec, o.fVec)); }
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M(Sk4i) greaterThanEqual(const Sk4f& o) const { return vreinterpretq_s32_u32(vcgeq_f32(fVec, o.fVec)); }
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M(Sk4f) Min(const Sk4f& a, const Sk4f& b) { return vminq_f32(a.fVec, b.fVec); }
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M(Sk4f) Max(const Sk4f& a, const Sk4f& b) { return vmaxq_f32(a.fVec, b.fVec); }
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// These shuffle operations are implemented more efficiently with SSE.
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// NEON has efficient zip, unzip, and transpose, but it is more costly to
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// exploit zip and unzip in order to shuffle.
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M(Sk4f) zwxy() const {
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float32x4x2_t zip = vzipq_f32(fVec, vdupq_n_f32(0.0));
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return vuzpq_f32(zip.val[1], zip.val[0]).val[0];
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}
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// Note that XYAB and ZWCD share code. If both are needed, they could be
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// implemented more efficiently together. Also, ABXY and CDZW are available
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// as well.
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M(Sk4f) XYAB(const Sk4f& xyzw, const Sk4f& abcd) {
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float32x4x2_t xayb_zcwd = vzipq_f32(xyzw.fVec, abcd.fVec);
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float32x4x2_t axby_czdw = vzipq_f32(abcd.fVec, xyzw.fVec);
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return vuzpq_f32(xayb_zcwd.val[0], axby_czdw.val[0]).val[0];
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}
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M(Sk4f) ZWCD(const Sk4f& xyzw, const Sk4f& abcd) {
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float32x4x2_t xayb_zcwd = vzipq_f32(xyzw.fVec, abcd.fVec);
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float32x4x2_t axby_czdw = vzipq_f32(abcd.fVec, xyzw.fVec);
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return vuzpq_f32(xayb_zcwd.val[1], axby_czdw.val[1]).val[0];
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}
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// Sk4i Methods
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#undef M
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#define M(...) template <> inline __VA_ARGS__ Sk4i::
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M() Sk4x(int32_t v) : fVec(vdupq_n_s32(v)) {}
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M() Sk4x(int32_t a, int32_t b, int32_t c, int32_t d) {
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// NEON lacks an intrinsic to make this easy. It is recommended to avoid
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// this constructor unless it is absolutely necessary.
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// There are a few different implementation strategies.
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// uint64_t ab_i = ((uint32_t) a) | (((uint64_t) b) << 32);
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// uint64_t cd_i = ((uint32_t) c) | (((uint64_t) d) << 32);
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// int32x2_t ab = vcreate_s32(ab_i);
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// int32x2_t cd = vcreate_s32(cd_i);
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// fVec = vcombine_s32(ab, cd);
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// This might not be a bad idea for the integer case. Either way I think,
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// we will need to move values from general registers to NEON registers.
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// I am choosing to use the set lane intrinsics. I am not certain that
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// this is the fastest approach. It may be useful to try the above code
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// for integers.
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fVec = vsetq_lane_s32(a, fVec, 0);
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fVec = vsetq_lane_s32(b, fVec, 1);
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fVec = vsetq_lane_s32(c, fVec, 2);
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fVec = vsetq_lane_s32(d, fVec, 3);
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}
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// As far as I can tell, it's not possible to provide an alignment hint to
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// NEON using intrinsics. However, I think it is possible at the assembly
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// level if we want to get into that.
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M(Sk4i) Load (const int32_t is[4]) { return vld1q_s32(is); }
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M(Sk4i) LoadAligned(const int32_t is[4]) { return vld1q_s32(is); }
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M(void) store (int32_t is[4]) const { vst1q_s32(is, fVec); }
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M(void) storeAligned(int32_t is[4]) const { vst1q_s32 (is, fVec); }
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template <>
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M(Sk4f) reinterpret<Sk4f>() const { return vreinterpretq_f32_s32(fVec); }
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template <>
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M(Sk4f) cast<Sk4f>() const { return vcvtq_f32_s32(fVec); }
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M(bool) allTrue() const {
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int32_t a = vgetq_lane_s32(fVec, 0);
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int32_t b = vgetq_lane_s32(fVec, 1);
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int32_t c = vgetq_lane_s32(fVec, 2);
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int32_t d = vgetq_lane_s32(fVec, 3);
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return a & b & c & d;
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}
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M(bool) anyTrue() const {
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int32_t a = vgetq_lane_s32(fVec, 0);
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int32_t b = vgetq_lane_s32(fVec, 1);
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int32_t c = vgetq_lane_s32(fVec, 2);
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int32_t d = vgetq_lane_s32(fVec, 3);
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return a | b | c | d;
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}
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M(Sk4i) bitNot() const { return vmvnq_s32(fVec); }
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M(Sk4i) bitAnd(const Sk4i& o) const { return vandq_s32(fVec, o.fVec); }
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M(Sk4i) bitOr (const Sk4i& o) const { return vorrq_s32(fVec, o.fVec); }
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M(Sk4i) equal (const Sk4i& o) const { return vreinterpretq_s32_u32(vceqq_s32(fVec, o.fVec)); }
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M(Sk4i) notEqual (const Sk4i& o) const { return vreinterpretq_s32_u32(vmvnq_u32(vceqq_s32(fVec, o.fVec))); }
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M(Sk4i) lessThan (const Sk4i& o) const { return vreinterpretq_s32_u32(vcltq_s32(fVec, o.fVec)); }
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M(Sk4i) greaterThan (const Sk4i& o) const { return vreinterpretq_s32_u32(vcgtq_s32(fVec, o.fVec)); }
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M(Sk4i) lessThanEqual (const Sk4i& o) const { return vreinterpretq_s32_u32(vcleq_s32(fVec, o.fVec)); }
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M(Sk4i) greaterThanEqual(const Sk4i& o) const { return vreinterpretq_s32_u32(vcgeq_s32(fVec, o.fVec)); }
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M(Sk4i) add (const Sk4i& o) const { return vaddq_s32(fVec, o.fVec); }
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M(Sk4i) subtract(const Sk4i& o) const { return vsubq_s32(fVec, o.fVec); }
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M(Sk4i) multiply(const Sk4i& o) const { return vmulq_s32(fVec, o.fVec); }
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// NEON does not have integer reciprocal, sqrt, or division.
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M(Sk4i) Min(const Sk4i& a, const Sk4i& b) { return vminq_s32(a.fVec, b.fVec); }
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M(Sk4i) Max(const Sk4i& a, const Sk4i& b) { return vmaxq_s32(a.fVec, b.fVec); }
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// These shuffle operations are implemented more efficiently with SSE.
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// NEON has efficient zip, unzip, and transpose, but it is more costly to
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// exploit zip and unzip in order to shuffle.
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M(Sk4i) zwxy() const {
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int32x4x2_t zip = vzipq_s32(fVec, vdupq_n_s32(0.0));
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return vuzpq_s32(zip.val[1], zip.val[0]).val[0];
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}
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// Note that XYAB and ZWCD share code. If both are needed, they could be
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// implemented more efficiently together. Also, ABXY and CDZW are available
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// as well.
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M(Sk4i) XYAB(const Sk4i& xyzw, const Sk4i& abcd) {
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int32x4x2_t xayb_zcwd = vzipq_s32(xyzw.fVec, abcd.fVec);
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int32x4x2_t axby_czdw = vzipq_s32(abcd.fVec, xyzw.fVec);
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return vuzpq_s32(xayb_zcwd.val[0], axby_czdw.val[0]).val[0];
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}
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M(Sk4i) ZWCD(const Sk4i& xyzw, const Sk4i& abcd) {
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int32x4x2_t xayb_zcwd = vzipq_s32(xyzw.fVec, abcd.fVec);
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int32x4x2_t axby_czdw = vzipq_s32(abcd.fVec, xyzw.fVec);
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return vuzpq_s32(xayb_zcwd.val[1], axby_czdw.val[1]).val[0];
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}
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#undef M
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#endif
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@ -77,7 +77,6 @@ DEF_TEST(Sk4x_Arith, r) {
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float third = 1.0f/3.0f;
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ASSERT_EQ(Sk4f(1*third, 0.5f, 0.6f, 2*third), Sk4f(1,2,3,4).divide(Sk4f(3,4,5,6)));
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ASSERT_EQ(Sk4i(4,6,8,10), Sk4i(1,2,3,4).add(Sk4i(3,4,5,6)));
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ASSERT_EQ(Sk4i(-2,-2,-2,-2), Sk4i(1,2,3,4).subtract(Sk4i(3,4,5,6)));
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ASSERT_EQ(Sk4i(3,8,15,24), Sk4i(1,2,3,4).multiply(Sk4i(3,4,5,6)));
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@ -91,11 +90,13 @@ DEF_TEST(Sk4x_Sqrt, r) {
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Sk4f squares(4, 16, 25, 121),
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roots(2, 4, 5, 11);
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// .sqrt() should be pretty precise.
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ASSERT_EQ(roots, squares.sqrt());
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Sk4f error = roots.subtract(squares.sqrt());
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REPORTER_ASSERT(r, error.greaterThanEqual(0.0f).allTrue());
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REPORTER_ASSERT(r, error.lessThan(0.000001f).allTrue());
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// .rsqrt() isn't so precise, but should be pretty close.
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Sk4f error = roots.subtract(squares.multiply(squares.rsqrt()));
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REPORTER_ASSERT(r, error.greaterThan(0.0f).allTrue());
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// .rsqrt() isn't so precise (for SSE), but should be pretty close.
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error = roots.subtract(squares.multiply(squares.rsqrt()));
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REPORTER_ASSERT(r, error.greaterThanEqual(0.0f).allTrue());
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REPORTER_ASSERT(r, error.lessThan(0.01f).allTrue());
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}
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