allow a fourth Val/Reg arg per op
This is a pure refactor, making room for a fourth argument per Op. I'll use this to make store128 work more naturally, taking all 128 bits of its input at once, rather than spreading across two strided 64-bit stores as done today. I've left this for a second CL because this refactor on its own seemed error-prone enough. Change-Id: I704e4f2e165b0bfd0276af921d97bf2cc01e8550 Reviewed-on: https://skia-review.googlesource.com/c/skia/+/355659 Reviewed-by: Herb Derby <herb@google.com> Commit-Queue: Mike Klein <mtklein@google.com>
This commit is contained in:
Mike Klein
Skia Commit-Bot
parent
ea27de5cb7
commit
f3087d8297
@ -230,7 +230,9 @@ namespace skvm {
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Op op = inst.op;
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Val x = inst.x,
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y = inst.y,
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z = inst.z;
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z = inst.z,
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w = inst.w;
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(void)w; // TODO: use in store128
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int immA = inst.immA,
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immB = inst.immB;
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switch (op) {
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@ -342,7 +344,9 @@ namespace skvm {
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Reg d = inst.d,
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x = inst.x,
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y = inst.y,
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z = inst.z;
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z = inst.z,
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w = inst.w;
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(void)w; // TODO: use in store128
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int immA = inst.immA,
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immB = inst.immB;
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switch (op) {
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@ -352,7 +356,7 @@ namespace skvm {
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case Op::store16: write(o, op, Ptr{immA}, R{x} ); break;
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case Op::store32: write(o, op, Ptr{immA}, R{x} ); break;
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case Op::store64: write(o, op, Ptr{immA}, R{x}, R{y} ); break;
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case Op::store128: write(o, op, Ptr{immA}, R{x}, R{y}, Hex{immB}); break;
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case Op::store128: write(o, op, Ptr{immA}, R{x}, R{y}, Hex{immB}); break; // TODO
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case Op::index: write(o, R{d}, "=", op); break;
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@ -425,7 +429,7 @@ namespace skvm {
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if (live[id] == false) {
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live[id] = true;
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Instruction inst = program[id];
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for (Val arg : {inst.x, inst.y, inst.z}) {
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for (Val arg : {inst.x, inst.y, inst.z, inst.w}) {
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if (arg != NA) { recurse(arg, recurse); }
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}
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}
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@ -443,7 +447,7 @@ namespace skvm {
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for (Val id = 0, next = 0; id < (Val)program.size(); id++) {
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if (live[id]) {
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Instruction& inst = program[id];
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for (Val* arg : {&inst.x, &inst.y, &inst.z}) {
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for (Val* arg : {&inst.x, &inst.y, &inst.z, &inst.w}) {
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if (*arg != NA) {
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*arg = new_id[*arg];
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SkASSERT(*arg != NA);
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@ -465,14 +469,14 @@ namespace skvm {
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std::vector<OptimizedInstruction> optimized(program.size());
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for (Val id = 0; id < (Val)program.size(); id++) {
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Instruction inst = program[id];
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optimized[id] = {inst.op, inst.x,inst.y,inst.z, inst.immA,inst.immB,
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optimized[id] = {inst.op, inst.x,inst.y,inst.z,inst.w, inst.immA,inst.immB,
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/*death=*/id, /*can_hoist=*/true};
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}
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// Each Instruction's inputs need to live at least until that Instruction issues.
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for (Val id = 0; id < (Val)optimized.size(); id++) {
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OptimizedInstruction& inst = optimized[id];
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for (Val arg : {inst.x, inst.y, inst.z}) {
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for (Val arg : {inst.x, inst.y, inst.z, inst.w}) {
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// (We're walking in order, so this is the same as max()ing with the existing Val.)
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if (arg != NA) { optimized[arg].death = id; }
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}
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@ -487,7 +491,7 @@ namespace skvm {
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// If any of an instruction's inputs can't be hoisted, it can't be hoisted itself.
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if (inst.can_hoist) {
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for (Val arg : {inst.x, inst.y, inst.z}) {
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for (Val arg : {inst.x, inst.y, inst.z, inst.w}) {
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if (arg != NA) { inst.can_hoist &= optimized[arg].can_hoist; }
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}
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}
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@ -496,7 +500,7 @@ namespace skvm {
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// Extend the lifetime of any hoisted value that's used in the loop to infinity.
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for (OptimizedInstruction& inst : optimized) {
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if (!inst.can_hoist /*i.e. we're in the loop, so the arguments are used-in-loop*/) {
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for (Val arg : {inst.x, inst.y, inst.z}) {
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for (Val arg : {inst.x, inst.y, inst.z, inst.w}) {
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if (arg != NA && optimized[arg].can_hoist) {
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optimized[arg].death = (Val)program.size();
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}
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@ -534,6 +538,7 @@ namespace skvm {
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&& a.x == b.x
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&& a.y == b.y
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&& a.z == b.z
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&& a.w == b.w
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&& a.immA == b.immA
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&& a.immB == b.immB;
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}
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@ -585,47 +590,47 @@ namespace skvm {
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#ifdef SK_DEBUG
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int imm;
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if (this->allImm(cond.id,&imm)) { SkASSERT(imm); return; }
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(void)push(Op::assert_true, cond.id,debug.id,NA);
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(void)push(Op::assert_true, cond.id, debug.id);
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#endif
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}
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void Builder::store8 (Ptr ptr, I32 val) { (void)push(Op::store8 , val.id,NA,NA, ptr.ix); }
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void Builder::store16(Ptr ptr, I32 val) { (void)push(Op::store16, val.id,NA,NA, ptr.ix); }
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void Builder::store32(Ptr ptr, I32 val) { (void)push(Op::store32, val.id,NA,NA, ptr.ix); }
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void Builder::store8 (Ptr ptr, I32 val) { (void)push(Op::store8 , val.id,NA,NA,NA, ptr.ix); }
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void Builder::store16(Ptr ptr, I32 val) { (void)push(Op::store16, val.id,NA,NA,NA, ptr.ix); }
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void Builder::store32(Ptr ptr, I32 val) { (void)push(Op::store32, val.id,NA,NA,NA, ptr.ix); }
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void Builder::store64(Ptr ptr, I32 lo, I32 hi) {
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(void)push(Op::store64, lo.id,hi.id,NA, ptr.ix);
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(void)push(Op::store64, lo.id,hi.id,NA,NA, ptr.ix);
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}
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void Builder::store128(Ptr ptr, I32 lo, I32 hi, int lane) {
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(void)push(Op::store128, lo.id,hi.id,NA, ptr.ix,lane);
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(void)push(Op::store128, lo.id,hi.id,NA,NA, ptr.ix,lane);
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}
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I32 Builder::index() { return {this, push(Op::index , NA,NA,NA,0) }; }
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I32 Builder::index() { return {this, push(Op::index)}; }
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I32 Builder::load8 (Ptr ptr) { return {this, push(Op::load8 , NA,NA,NA, ptr.ix) }; }
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I32 Builder::load16(Ptr ptr) { return {this, push(Op::load16, NA,NA,NA, ptr.ix) }; }
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I32 Builder::load32(Ptr ptr) { return {this, push(Op::load32, NA,NA,NA, ptr.ix) }; }
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I32 Builder::load8 (Ptr ptr) { return {this, push(Op::load8 , NA,NA,NA,NA, ptr.ix) }; }
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I32 Builder::load16(Ptr ptr) { return {this, push(Op::load16, NA,NA,NA,NA, ptr.ix) }; }
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I32 Builder::load32(Ptr ptr) { return {this, push(Op::load32, NA,NA,NA,NA, ptr.ix) }; }
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I32 Builder::load64(Ptr ptr, int lane) {
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return {this, push(Op::load64 , NA,NA,NA, ptr.ix,lane) };
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return {this, push(Op::load64 , NA,NA,NA,NA, ptr.ix,lane) };
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}
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I32 Builder::load128(Ptr ptr, int lane) {
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return {this, push(Op::load128, NA,NA,NA, ptr.ix,lane) };
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return {this, push(Op::load128, NA,NA,NA,NA, ptr.ix,lane) };
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}
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I32 Builder::gather8 (Ptr ptr, int offset, I32 index) {
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return {this, push(Op::gather8 , index.id,NA,NA, ptr.ix,offset)};
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return {this, push(Op::gather8 , index.id,NA,NA,NA, ptr.ix,offset)};
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}
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I32 Builder::gather16(Ptr ptr, int offset, I32 index) {
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return {this, push(Op::gather16, index.id,NA,NA, ptr.ix,offset)};
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return {this, push(Op::gather16, index.id,NA,NA,NA, ptr.ix,offset)};
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}
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I32 Builder::gather32(Ptr ptr, int offset, I32 index) {
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return {this, push(Op::gather32, index.id,NA,NA, ptr.ix,offset)};
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return {this, push(Op::gather32, index.id,NA,NA,NA, ptr.ix,offset)};
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}
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I32 Builder::uniform32(Ptr ptr, int offset) {
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return {this, push(Op::uniform32, NA,NA,NA, ptr.ix, offset)};
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return {this, push(Op::uniform32, NA,NA,NA,NA, ptr.ix, offset)};
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}
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I32 Builder::splat(int n) { return {this, push(Op::splat , NA,NA,NA, n) }; }
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I32 Builder::splat(int n) { return {this, push(Op::splat, NA,NA,NA,NA, n) }; }
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// Be careful peepholing float math! Transformations you might expect to
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// be legal can fail in the face of NaN/Inf, e.g. 0*x is not always 0.
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@ -687,7 +692,7 @@ namespace skvm {
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F32 Builder::sqrt(F32 x) {
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if (float X; this->allImm(x.id,&X)) { return splat(std::sqrt(X)); }
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return {this, this->push(Op::sqrt_f32, x.id,NA,NA)};
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return {this, this->push(Op::sqrt_f32, x.id)};
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}
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// See http://www.machinedlearnings.com/2011/06/fast-approximate-logarithm-exponential.html.
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@ -880,17 +885,17 @@ namespace skvm {
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I32 Builder::shl(I32 x, int bits) {
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if (bits == 0) { return x; }
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if (int X; this->allImm(x.id,&X)) { return splat(X << bits); }
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return {this, this->push(Op::shl_i32, x.id,NA,NA, bits)};
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return {this, this->push(Op::shl_i32, x.id,NA,NA,NA, bits)};
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}
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I32 Builder::shr(I32 x, int bits) {
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if (bits == 0) { return x; }
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if (int X; this->allImm(x.id,&X)) { return splat(unsigned(X) >> bits); }
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return {this, this->push(Op::shr_i32, x.id,NA,NA, bits)};
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return {this, this->push(Op::shr_i32, x.id,NA,NA,NA, bits)};
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}
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I32 Builder::sra(I32 x, int bits) {
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if (bits == 0) { return x; }
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if (int X; this->allImm(x.id,&X)) { return splat(X >> bits); }
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return {this, this->push(Op::sra_i32, x.id,NA,NA, bits)};
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return {this, this->push(Op::sra_i32, x.id,NA,NA,NA, bits)};
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}
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I32 Builder:: eq(F32 x, F32 y) {
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@ -2469,7 +2474,7 @@ namespace skvm {
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std::vector<llvm::Value*> vals(instructions.size());
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auto emit = [&](size_t i, bool scalar, IRBuilder* b) {
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auto [op, x,y,z, immA,immB, death,can_hoist] = instructions[i];
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auto [op, x,y,z,w, immA,immB, death,can_hoist] = instructions[i];
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llvm::Type *i1 = llvm::Type::getInt1Ty (*ctx),
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*i8 = llvm::Type::getInt8Ty (*ctx),
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@ -2968,6 +2973,7 @@ namespace skvm {
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lookup_register(inst.x),
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lookup_register(inst.y),
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lookup_register(inst.z),
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lookup_register(inst.w),
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inst.immA,
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inst.immB,
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};
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@ -3191,7 +3197,8 @@ namespace skvm {
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const Op op = inst.op;
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const Val x = inst.x,
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y = inst.y,
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z = inst.z;
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z = inst.z,
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w = inst.w;
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const int immA = inst.immA,
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immB = inst.immB;
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@ -3241,17 +3248,19 @@ namespace skvm {
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regs[r] = NA;
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};
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// Which register holds dst,x,y,z for this instruction? NA if none does yet.
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// Which register holds dst,x,y,z,w for this instruction? NA if none does yet.
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int rd = NA,
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rx = NA,
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ry = NA,
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rz = NA;
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rz = NA,
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rw = NA;
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auto update_regs = [&](Reg r, Val v) {
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if (v == id) { rd = r; }
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if (v == x) { rx = r; }
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if (v == y) { ry = r; }
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if (v == z) { rz = r; }
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if (v == w) { rw = r; }
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return r;
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};
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@ -3261,6 +3270,7 @@ namespace skvm {
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if (v == x && rx != NA) { return rx; }
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if (v == y && ry != NA) { return ry; }
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if (v == z && rz != NA) { return rz; }
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if (v == w && rw != NA) { return rw; }
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// Search inter-instruction register map.
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for (auto [r,val] : SkMakeEnumerate(regs)) {
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@ -3912,6 +3922,7 @@ namespace skvm {
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if (rx != NA && regs[rx] != NA && dies_here(regs[rx])) { regs[rx] = NA; }
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if (ry != NA && regs[ry] != NA && dies_here(regs[ry])) { regs[ry] = NA; }
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if (rz != NA && regs[rz] != NA && dies_here(regs[rz])) { regs[rz] = NA; }
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if (rw != NA && regs[rw] != NA && dies_here(regs[rw])) { regs[rw] = NA; }
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return true;
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};
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@ -546,9 +546,9 @@ namespace skvm {
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SK_BEGIN_REQUIRE_DENSE
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struct Instruction {
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Op op; // v* = op(x,y,z,imm), where * == index of this Instruction.
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Val x,y,z; // Enough arguments for mad().
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int immA,immB; // Immediate bit pattern, shift count, argument index, etc.
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Op op; // v* = op(x,y,z,w,immA,immB), where * == index of this Instruction.
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Val x,y,z,w; // Enough arguments for Op::store128.
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int immA,immB; // Immediate bit pattern, shift count, pointer index, byte offset, etc.
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};
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SK_END_REQUIRE_DENSE
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@ -559,7 +559,7 @@ namespace skvm {
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struct OptimizedInstruction {
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Op op;
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Val x,y,z;
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Val x,y,z,w;
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int immA,immB;
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Val death;
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@ -898,8 +898,8 @@ namespace skvm {
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Val push(Instruction);
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private:
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Val push(Op op, Val x, Val y=NA, Val z=NA, int immA=0, int immB=0) {
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return this->push(Instruction{op, x,y,z, immA,immB});
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Val push(Op op, Val x=NA, Val y=NA, Val z=NA, Val w=NA, int immA=0, int immB=0) {
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return this->push(Instruction{op, x,y,z,w, immA,immB});
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}
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bool allImm() const;
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@ -926,10 +926,10 @@ namespace skvm {
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using Reg = int;
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// d = op(x, y/imm, z/imm)
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// d = op(x,y,z,w, immA,immB)
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struct InterpreterInstruction {
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Op op;
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Reg d,x,y,z;
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Reg d,x,y,z,w;
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int immA,immB;
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};
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@ -86,11 +86,13 @@ namespace SK_OPTS_NS {
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for (int i = start; i < ninsts; i++) {
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InterpreterInstruction inst = insts[i];
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// d = op(x,y/imm,z/imm)
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// d = op(x,y,z,w, immA,immB)
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Reg d = inst.d,
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x = inst.x,
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y = inst.y,
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z = inst.z;
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z = inst.z,
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w = inst.w;
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(void)w; // TODO: use in store128
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int immA = inst.immA,
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immB = inst.immB;
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