306 lines
11 KiB
C
306 lines
11 KiB
C
/*
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* Copyright (C) 2010 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef CPU_FEATURES_H
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#define CPU_FEATURES_H
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#include <sys/cdefs.h>
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#include <stdint.h>
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__BEGIN_DECLS
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/* A list of valid values returned by android_getCpuFamily().
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* They describe the CPU Architecture of the current process.
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*/
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typedef enum {
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ANDROID_CPU_FAMILY_UNKNOWN = 0,
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ANDROID_CPU_FAMILY_ARM,
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ANDROID_CPU_FAMILY_X86,
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ANDROID_CPU_FAMILY_MIPS,
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ANDROID_CPU_FAMILY_ARM64,
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ANDROID_CPU_FAMILY_X86_64,
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ANDROID_CPU_FAMILY_MIPS64,
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ANDROID_CPU_FAMILY_MAX /* do not remove */
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} AndroidCpuFamily;
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/* Return the CPU family of the current process.
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*
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* Note that this matches the bitness of the current process. I.e. when
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* running a 32-bit binary on a 64-bit capable CPU, this will return the
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* 32-bit CPU family value.
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*/
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extern AndroidCpuFamily android_getCpuFamily(void);
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/* Return a bitmap describing a set of optional CPU features that are
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* supported by the current device's CPU. The exact bit-flags returned
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* depend on the value returned by android_getCpuFamily(). See the
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* documentation for the ANDROID_CPU_*_FEATURE_* flags below for details.
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*
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* NOTE: This will return 0 for the following architectures that don't have
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* optional features listed at the moment:
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*
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* ANDROID_CPU_FAMILY_MIPS
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* ANDROID_CPU_FAMILY_ARM64
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* ANDROID_CPU_FAMILY_X86_64
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* ANDROID_CPU_FAMILY_MIPS64
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*/
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extern uint64_t android_getCpuFeatures(void);
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/* The list of feature flags for ANDROID_CPU_FAMILY_ARM that can be
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* recognized by the library (see note below for 64-bit ARM). Value details
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* are:
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*
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* VFPv2:
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* CPU supports the VFPv2 instruction set. Many, but not all, ARMv6 CPUs
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* support these instructions. VFPv2 is a subset of VFPv3 so this will
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* be set whenever VFPv3 is set too.
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*
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* ARMv7:
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* CPU supports the ARMv7-A basic instruction set.
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* This feature is mandated by the 'armeabi-v7a' ABI.
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*
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* VFPv3:
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* CPU supports the VFPv3-D16 instruction set, providing hardware FPU
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* support for single and double precision floating point registers.
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* Note that only 16 FPU registers are available by default, unless
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* the D32 bit is set too. This feature is also mandated by the
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* 'armeabi-v7a' ABI.
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*
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* VFP_D32:
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* CPU VFP optional extension that provides 32 FPU registers,
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* instead of 16. Note that ARM mandates this feature is the 'NEON'
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* feature is implemented by the CPU.
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*
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* NEON:
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* CPU FPU supports "ARM Advanced SIMD" instructions, also known as
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* NEON. Note that this mandates the VFP_D32 feature as well, per the
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* ARM Architecture specification.
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*
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* VFP_FP16:
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* Half-width floating precision VFP extension. If set, the CPU
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* supports instructions to perform floating-point operations on
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* 16-bit registers. This is part of the VFPv4 specification, but
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* not mandated by any Android ABI.
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*
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* VFP_FMA:
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* Fused multiply-accumulate VFP instructions extension. Also part of
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* the VFPv4 specification, but not mandated by any Android ABI.
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*
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* NEON_FMA:
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* Fused multiply-accumulate NEON instructions extension. Optional
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* extension from the VFPv4 specification, but not mandated by any
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* Android ABI.
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*
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* IDIV_ARM:
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* Integer division available in ARM mode. Only available
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* on recent CPUs (e.g. Cortex-A15).
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*
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* IDIV_THUMB2:
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* Integer division available in Thumb-2 mode. Only available
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* on recent CPUs (e.g. Cortex-A15).
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*
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* iWMMXt:
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* Optional extension that adds MMX registers and operations to an
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* ARM CPU. This is only available on a few XScale-based CPU designs
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* sold by Marvell. Pretty rare in practice.
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*
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* AES:
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* CPU supports AES instructions. These instructions are only
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* available for 32-bit applications running on ARMv8 CPU.
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*
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* CRC32:
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* CPU supports CRC32 instructions. These instructions are only
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* available for 32-bit applications running on ARMv8 CPU.
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*
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* SHA2:
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* CPU supports SHA2 instructions. These instructions are only
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* available for 32-bit applications running on ARMv8 CPU.
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*
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* SHA1:
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* CPU supports SHA1 instructions. These instructions are only
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* available for 32-bit applications running on ARMv8 CPU.
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*
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* PMULL:
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* CPU supports 64-bit PMULL and PMULL2 instructions. These
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* instructions are only available for 32-bit applications
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* running on ARMv8 CPU.
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*
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* If you want to tell the compiler to generate code that targets one of
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* the feature set above, you should probably use one of the following
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* flags (for more details, see technical note at the end of this file):
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*
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* -mfpu=vfp
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* -mfpu=vfpv2
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* These are equivalent and tell GCC to use VFPv2 instructions for
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* floating-point operations. Use this if you want your code to
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* run on *some* ARMv6 devices, and any ARMv7-A device supported
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* by Android.
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*
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* Generated code requires VFPv2 feature.
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*
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* -mfpu=vfpv3-d16
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* Tell GCC to use VFPv3 instructions (using only 16 FPU registers).
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* This should be generic code that runs on any CPU that supports the
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* 'armeabi-v7a' Android ABI. Note that no ARMv6 CPU supports this.
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*
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* Generated code requires VFPv3 feature.
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*
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* -mfpu=vfpv3
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* Tell GCC to use VFPv3 instructions with 32 FPU registers.
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* Generated code requires VFPv3|VFP_D32 features.
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*
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* -mfpu=neon
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* Tell GCC to use VFPv3 instructions with 32 FPU registers, and
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* also support NEON intrinsics (see <arm_neon.h>).
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* Generated code requires VFPv3|VFP_D32|NEON features.
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*
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* -mfpu=vfpv4-d16
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* Generated code requires VFPv3|VFP_FP16|VFP_FMA features.
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*
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* -mfpu=vfpv4
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* Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32 features.
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*
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* -mfpu=neon-vfpv4
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* Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32|NEON|NEON_FMA
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* features.
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*
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* -mcpu=cortex-a7
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* -mcpu=cortex-a15
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* Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32|
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* NEON|NEON_FMA|IDIV_ARM|IDIV_THUMB2
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* This flag implies -mfpu=neon-vfpv4.
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*
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* -mcpu=iwmmxt
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* Allows the use of iWMMXt instrinsics with GCC.
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*
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* IMPORTANT NOTE: These flags should only be tested when
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* android_getCpuFamily() returns ANDROID_CPU_FAMILY_ARM, i.e. this is a
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* 32-bit process.
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*
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* When running a 64-bit ARM process on an ARMv8 CPU,
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* android_getCpuFeatures() will return a different set of bitflags
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*/
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enum {
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ANDROID_CPU_ARM_FEATURE_ARMv7 = (1 << 0),
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ANDROID_CPU_ARM_FEATURE_VFPv3 = (1 << 1),
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ANDROID_CPU_ARM_FEATURE_NEON = (1 << 2),
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ANDROID_CPU_ARM_FEATURE_LDREX_STREX = (1 << 3),
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ANDROID_CPU_ARM_FEATURE_VFPv2 = (1 << 4),
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ANDROID_CPU_ARM_FEATURE_VFP_D32 = (1 << 5),
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ANDROID_CPU_ARM_FEATURE_VFP_FP16 = (1 << 6),
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ANDROID_CPU_ARM_FEATURE_VFP_FMA = (1 << 7),
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ANDROID_CPU_ARM_FEATURE_NEON_FMA = (1 << 8),
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ANDROID_CPU_ARM_FEATURE_IDIV_ARM = (1 << 9),
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ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 = (1 << 10),
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ANDROID_CPU_ARM_FEATURE_iWMMXt = (1 << 11),
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ANDROID_CPU_ARM_FEATURE_AES = (1 << 12),
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ANDROID_CPU_ARM_FEATURE_PMULL = (1 << 13),
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ANDROID_CPU_ARM_FEATURE_SHA1 = (1 << 14),
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ANDROID_CPU_ARM_FEATURE_SHA2 = (1 << 15),
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ANDROID_CPU_ARM_FEATURE_CRC32 = (1 << 16),
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};
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/* The bit flags corresponding to the output of android_getCpuFeatures()
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* when android_getCpuFamily() returns ANDROID_CPU_FAMILY_ARM64. Value details
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* are:
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*
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* FP:
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* CPU has Floating-point unit.
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*
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* ASIMD:
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* CPU has Advanced SIMD unit.
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*
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* AES:
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* CPU supports AES instructions.
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*
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* CRC32:
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* CPU supports CRC32 instructions.
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*
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* SHA2:
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* CPU supports SHA2 instructions.
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*
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* SHA1:
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* CPU supports SHA1 instructions.
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*
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* PMULL:
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* CPU supports 64-bit PMULL and PMULL2 instructions.
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*/
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enum {
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ANDROID_CPU_ARM64_FEATURE_FP = (1 << 0),
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ANDROID_CPU_ARM64_FEATURE_ASIMD = (1 << 1),
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ANDROID_CPU_ARM64_FEATURE_AES = (1 << 2),
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ANDROID_CPU_ARM64_FEATURE_PMULL = (1 << 3),
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ANDROID_CPU_ARM64_FEATURE_SHA1 = (1 << 4),
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ANDROID_CPU_ARM64_FEATURE_SHA2 = (1 << 5),
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ANDROID_CPU_ARM64_FEATURE_CRC32 = (1 << 6),
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};
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/* The bit flags corresponding to the output of android_getCpuFeatures()
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* when android_getCpuFamily() returns ANDROID_CPU_FAMILY_X86.
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*/
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enum {
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ANDROID_CPU_X86_FEATURE_SSSE3 = (1 << 0),
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ANDROID_CPU_X86_FEATURE_POPCNT = (1 << 1),
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ANDROID_CPU_X86_FEATURE_MOVBE = (1 << 2),
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};
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/* Return the number of CPU cores detected on this device. */
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extern int android_getCpuCount(void);
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/* The following is used to force the CPU count and features
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* mask in sandboxed processes. Under 4.1 and higher, these processes
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* cannot access /proc, which is the only way to get information from
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* the kernel about the current hardware (at least on ARM).
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*
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* It _must_ be called only once, and before any android_getCpuXXX
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* function, any other case will fail.
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*
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* This function return 1 on success, and 0 on failure.
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*/
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extern int android_setCpu(int cpu_count,
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uint64_t cpu_features);
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#ifdef __arm__
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/* Retrieve the ARM 32-bit CPUID value from the kernel.
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* Note that this cannot work on sandboxed processes under 4.1 and
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* higher, unless you called android_setCpuArm() before.
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*/
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extern uint32_t android_getCpuIdArm(void);
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/* An ARM-specific variant of android_setCpu() that also allows you
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* to set the ARM CPUID field.
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*/
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extern int android_setCpuArm(int cpu_count,
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uint64_t cpu_features,
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uint32_t cpu_id);
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#endif
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__END_DECLS
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#endif /* CPU_FEATURES_H */
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