2b7b2a2331
I was just reading the ARM docs and realized that their BIC ("BIt Clear") is the same as SSE's ANDN ("AND Not") instruction. It's kind of a neat little tool to have laying around... comes up more than you'd think, and it's sometimes the clearest way to express what you're doing, as in the changed program here where the comment is "mask away the low bits". That's a bit_clear with a mask for what you want to clear away! And the real reason to write this up is that I want to have a CL to point to that shows how to add an instruction top to bottom. Change-Id: I99690ed9c1009427b3986955e7ae6264de4d215c Reviewed-on: https://skia-review.googlesource.com/c/skia/+/223120 Commit-Queue: Mike Klein <mtklein@google.com> Reviewed-by: Herb Derby <herb@google.com> Reviewed-by: Mike Reed <reed@google.com>
197 lines
5.9 KiB
C++
197 lines
5.9 KiB
C++
/*
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* Copyright 2019 Google Inc.
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*
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "tools/SkVMBuilders.h"
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// Some parts of this builder code are written less fluently than possible,
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// to avoid any ambiguity of function argument evaluation order. This lets
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// our golden tests work portably. In general there's no reason to fear
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// nesting calls to Builder routines.
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SrcoverBuilder_F32::SrcoverBuilder_F32(Fmt srcFmt, Fmt dstFmt) {
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skvm::Arg src = arg(0),
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dst = arg(1);
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auto byte_to_f32 = [&](skvm::I32 byte) {
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skvm::F32 _1_255 = splat(1/255.0f);
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return mul(_1_255, to_f32(byte));
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};
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auto load = [&](skvm::Arg ptr, Fmt fmt,
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skvm::F32* r, skvm::F32* g, skvm::F32* b, skvm::F32* a) {
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switch (fmt) {
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case Fmt::A8: {
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*r = *g = *b = splat(0.0f);
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*a = byte_to_f32(load8(ptr));
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} break;
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case Fmt::G8: {
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*r = *g = *b = byte_to_f32(load8(ptr));
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*a = splat(1.0f);
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} break;
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case Fmt::RGBA_8888: {
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skvm::I32 rgba = load32(ptr);
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*r = byte_to_f32(extract(rgba, 0, splat(0xff)));
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*g = byte_to_f32(extract(rgba, 8, splat(0xff)));
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*b = byte_to_f32(extract(rgba, 16, splat(0xff)));
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*a = byte_to_f32(extract(rgba, 24, splat(0xff)));
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} break;
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}
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};
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skvm::F32 r,g,b,a;
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load(src, srcFmt, &r,&g,&b,&a);
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skvm::F32 dr,dg,db,da;
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load(dst, dstFmt, &dr,&dg,&db,&da);
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skvm::F32 invA = sub(splat(1.0f), a);
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r = mad(dr, invA, r);
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g = mad(dg, invA, g);
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b = mad(db, invA, b);
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a = mad(da, invA, a);
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auto f32_to_byte = [&](skvm::F32 f32) {
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skvm::F32 _255 = splat(255.0f),
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_0_5 = splat(0.5f);
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return to_i32(mad(f32, _255, _0_5));
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};
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switch (dstFmt) {
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case Fmt::A8: {
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store8(dst, f32_to_byte(a));
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} break;
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case Fmt::G8: {
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skvm::F32 _2126 = splat(0.2126f),
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_7152 = splat(0.7152f),
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_0722 = splat(0.0722f);
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store8(dst, f32_to_byte(mad(r, _2126,
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mad(g, _7152,
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mul(b, _0722)))));
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} break;
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case Fmt::RGBA_8888: {
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skvm::I32 R = f32_to_byte(r),
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G = f32_to_byte(g),
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B = f32_to_byte(b),
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A = f32_to_byte(a);
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R = pack(R, G, 8);
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B = pack(B, A, 8);
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R = pack(R, B, 16);
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store32(dst, R);
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} break;
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}
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}
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SrcoverBuilder_I32_Naive::SrcoverBuilder_I32_Naive() {
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skvm::Arg src = arg(0),
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dst = arg(1);
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auto load = [&](skvm::Arg ptr,
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skvm::I32* r, skvm::I32* g, skvm::I32* b, skvm::I32* a) {
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skvm::I32 rgba = load32(ptr);
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*r = extract(rgba, 0, splat(0xff));
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*g = extract(rgba, 8, splat(0xff));
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*b = extract(rgba, 16, splat(0xff));
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*a = extract(rgba, 24, splat(0xff));
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};
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skvm::I32 r,g,b,a;
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load(src, &r,&g,&b,&a);
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skvm::I32 dr,dg,db,da;
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load(dst, &dr,&dg,&db,&da);
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// (xy + x)/256 is a good approximation of (xy + 127)/255
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//
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// == (d*(255-a) + d)/256
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// == (d*(255-a+1) )/256
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// == (d*(256-a ) )/256
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skvm::I32 invA = sub(splat(256), a);
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r = add(r, shr(mul(dr, invA), 8));
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g = add(g, shr(mul(dg, invA), 8));
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b = add(b, shr(mul(db, invA), 8));
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a = add(a, shr(mul(da, invA), 8));
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r = pack(r, g, 8);
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b = pack(b, a, 8);
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r = pack(r, b, 16);
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store32(dst, r);
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}
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SrcoverBuilder_I32::SrcoverBuilder_I32() {
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skvm::Arg src = arg(0),
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dst = arg(1);
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auto load = [&](skvm::Arg ptr,
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skvm::I32* r, skvm::I32* g, skvm::I32* b, skvm::I32* a) {
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skvm::I32 rgba = load32(ptr);
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*r = bit_and(rgba, splat(0xff));
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*g = bytes (rgba, 0x0002);
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*b = bytes (rgba, 0x0003);
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*a = shr (rgba, 24);
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};
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skvm::I32 r,g,b,a;
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load(src, &r,&g,&b,&a);
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skvm::I32 dr,dg,db,da;
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load(dst, &dr,&dg,&db,&da);
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// (xy + x)/256 is a good approximation of (xy + 127)/255
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//
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// == (d*(255-a) + d)/256
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// == (d*(255-a+1) )/256
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// == (d*(256-a ) )/256
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// We're doing 8x8 bit multiplies in 32-bit lanes.
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// Since the inputs and results both fit in 16 bits,
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// we can use mul_16x2, which tends to be faster than mul.
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//
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// (The top 2 zero bytes of the inputs will also multiply
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// with each other to produce zero... perfect.)
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skvm::I32 invA = sub(splat(256), a);
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r = add(r, shr(mul_16x2(dr, invA), 8));
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g = add(g, shr(mul_16x2(dg, invA), 8));
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b = add(b, shr(mul_16x2(db, invA), 8));
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a = add(a, shr(mul_16x2(da, invA), 8));
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r = pack(r, g, 8);
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b = pack(b, a, 8);
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r = pack(r, b, 16);
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store32(dst, r);
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}
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SrcoverBuilder_I32_SWAR::SrcoverBuilder_I32_SWAR() {
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skvm::Arg src = arg(0),
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dst = arg(1);
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// The s += d*invA adds won't overflow,
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// so we don't have to unpack s beyond grabbing the alpha channel.
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skvm::I32 s = load32(src),
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ax2 = bytes(s, 0x0404); // rgba -> a0a0
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// We'll use the same approximation math as above, this time making sure to
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// use both i16 multiplies to our benefit, one for r/g, the other for b/a.
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skvm::I32 invAx2 = sub_16x2(splat(0x01000100), ax2);
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skvm::I32 d = load32(dst),
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rb = bit_and (d, splat(0x00ff00ff)),
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ga = shr_16x2(d, 8);
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rb = shr_16x2(mul_16x2(rb, invAx2), 8); // Put the high 8 bits back in the low lane.
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ga = mul_16x2(ga, invAx2); // Keep the high 8 bits up high...
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ga = bit_clear(ga, splat(0x00ff00ff)); // ...and mask off the low bits.
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store32(dst, add(s, bit_or(rb, ga)));
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}
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