384 lines
12 KiB
C++
384 lines
12 KiB
C++
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// Copyright 2017 the V8 project authors. All rights reserved.
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following
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// disclaimer in the documentation and/or other materials provided
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// with the distribution.
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// * Neither the name of Google Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include "src/v8.h"
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#include "test/cctest/cctest.h"
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#include "src/arm64/simulator-arm64.h"
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#include "src/factory.h"
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#include "src/macro-assembler.h"
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#if defined(USE_SIMULATOR)
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#ifndef V8_TARGET_LITTLE_ENDIAN
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#error Expected ARM to be little-endian
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#endif
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using namespace v8::base;
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using namespace v8::internal;
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#define __ masm.
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struct MemoryAccess {
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enum class Kind {
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None,
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Load,
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LoadExcl,
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Store,
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StoreExcl,
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};
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enum class Size {
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Byte,
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HalfWord,
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Word,
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};
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MemoryAccess() : kind(Kind::None) {}
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MemoryAccess(Kind kind, Size size, size_t offset, int value = 0)
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: kind(kind), size(size), offset(offset), value(value) {}
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Kind kind = Kind::None;
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Size size = Size::Byte;
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size_t offset = 0;
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int value = 0;
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};
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struct TestData {
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explicit TestData(int w) : w(w) {}
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union {
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int32_t w;
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int16_t h;
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int8_t b;
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};
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int dummy;
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};
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static void AssembleMemoryAccess(MacroAssembler* assembler, MemoryAccess access,
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Register dest_reg, Register value_reg,
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Register addr_reg) {
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MacroAssembler& masm = *assembler;
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__ Add(addr_reg, x0, Operand(access.offset));
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switch (access.kind) {
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case MemoryAccess::Kind::None:
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break;
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case MemoryAccess::Kind::Load:
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switch (access.size) {
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case MemoryAccess::Size::Byte:
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__ ldrb(value_reg, MemOperand(addr_reg));
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break;
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case MemoryAccess::Size::HalfWord:
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__ ldrh(value_reg, MemOperand(addr_reg));
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break;
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case MemoryAccess::Size::Word:
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__ ldr(value_reg, MemOperand(addr_reg));
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break;
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}
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break;
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case MemoryAccess::Kind::LoadExcl:
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switch (access.size) {
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case MemoryAccess::Size::Byte:
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__ ldaxrb(value_reg, addr_reg);
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break;
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case MemoryAccess::Size::HalfWord:
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__ ldaxrh(value_reg, addr_reg);
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break;
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case MemoryAccess::Size::Word:
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__ ldaxr(value_reg, addr_reg);
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break;
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}
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break;
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case MemoryAccess::Kind::Store:
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switch (access.size) {
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case MemoryAccess::Size::Byte:
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__ Mov(value_reg, Operand(access.value));
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__ strb(value_reg, MemOperand(addr_reg));
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break;
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case MemoryAccess::Size::HalfWord:
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__ Mov(value_reg, Operand(access.value));
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__ strh(value_reg, MemOperand(addr_reg));
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break;
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case MemoryAccess::Size::Word:
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__ Mov(value_reg, Operand(access.value));
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__ str(value_reg, MemOperand(addr_reg));
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break;
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}
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break;
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case MemoryAccess::Kind::StoreExcl:
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switch (access.size) {
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case MemoryAccess::Size::Byte:
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__ Mov(value_reg, Operand(access.value));
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__ stlxrb(dest_reg, value_reg, addr_reg);
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break;
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case MemoryAccess::Size::HalfWord:
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__ Mov(value_reg, Operand(access.value));
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__ stlxrh(dest_reg, value_reg, addr_reg);
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break;
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case MemoryAccess::Size::Word:
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__ Mov(value_reg, Operand(access.value));
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__ stlxr(dest_reg, value_reg, addr_reg);
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break;
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}
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break;
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}
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}
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static void AssembleLoadExcl(MacroAssembler* assembler, MemoryAccess access,
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Register value_reg, Register addr_reg) {
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DCHECK(access.kind == MemoryAccess::Kind::LoadExcl);
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AssembleMemoryAccess(assembler, access, no_reg, value_reg, addr_reg);
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}
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static void AssembleStoreExcl(MacroAssembler* assembler, MemoryAccess access,
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Register dest_reg, Register value_reg,
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Register addr_reg) {
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DCHECK(access.kind == MemoryAccess::Kind::StoreExcl);
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AssembleMemoryAccess(assembler, access, dest_reg, value_reg, addr_reg);
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}
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static void TestInvalidateExclusiveAccess(
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TestData initial_data, MemoryAccess access1, MemoryAccess access2,
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MemoryAccess access3, int expected_res, TestData expected_data) {
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Isolate* isolate = CcTest::i_isolate();
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HandleScope scope(isolate);
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MacroAssembler masm(isolate, NULL, 0, v8::internal::CodeObjectRequired::kYes);
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AssembleLoadExcl(&masm, access1, w1, x1);
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AssembleMemoryAccess(&masm, access2, w3, w2, x1);
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AssembleStoreExcl(&masm, access3, w0, w3, x1);
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__ br(lr);
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CodeDesc desc;
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masm.GetCode(&desc);
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Handle<Code> code = isolate->factory()->NewCode(
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desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
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TestData t = initial_data;
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Simulator::CallArgument args[] = {
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Simulator::CallArgument(reinterpret_cast<uintptr_t>(&t)),
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Simulator::CallArgument::End()};
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Simulator::current(isolate)->CallVoid(code->entry(), args);
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int res = Simulator::current(isolate)->wreg(0);
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CHECK_EQ(expected_res, res);
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switch (access3.size) {
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case MemoryAccess::Size::Byte:
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CHECK_EQ(expected_data.b, t.b);
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break;
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case MemoryAccess::Size::HalfWord:
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CHECK_EQ(expected_data.h, t.h);
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break;
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case MemoryAccess::Size::Word:
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CHECK_EQ(expected_data.w, t.w);
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break;
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}
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}
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TEST(simulator_invalidate_exclusive_access) {
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using Kind = MemoryAccess::Kind;
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using Size = MemoryAccess::Size;
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MemoryAccess ldaxr_w(Kind::LoadExcl, Size::Word, offsetof(TestData, w));
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MemoryAccess stlxr_w(Kind::StoreExcl, Size::Word, offsetof(TestData, w), 7);
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// Address mismatch.
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TestInvalidateExclusiveAccess(
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TestData(1), ldaxr_w,
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MemoryAccess(Kind::LoadExcl, Size::Word, offsetof(TestData, dummy)),
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stlxr_w, 1, TestData(1));
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// Size mismatch.
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TestInvalidateExclusiveAccess(
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TestData(1), ldaxr_w, MemoryAccess(),
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MemoryAccess(Kind::StoreExcl, Size::HalfWord, offsetof(TestData, w), 7),
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1, TestData(1));
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// Load between ldaxr/stlxr.
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TestInvalidateExclusiveAccess(
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TestData(1), ldaxr_w,
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MemoryAccess(Kind::Load, Size::Word, offsetof(TestData, dummy)), stlxr_w,
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1, TestData(1));
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// Store between ldaxr/stlxr.
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TestInvalidateExclusiveAccess(
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TestData(1), ldaxr_w,
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MemoryAccess(Kind::Store, Size::Word, offsetof(TestData, dummy)), stlxr_w,
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1, TestData(1));
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// Match
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TestInvalidateExclusiveAccess(TestData(1), ldaxr_w, MemoryAccess(), stlxr_w,
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0, TestData(7));
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}
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static int ExecuteMemoryAccess(Isolate* isolate, TestData* test_data,
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MemoryAccess access) {
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HandleScope scope(isolate);
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MacroAssembler masm(isolate, NULL, 0, v8::internal::CodeObjectRequired::kYes);
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AssembleMemoryAccess(&masm, access, w0, w2, x1);
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__ br(lr);
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CodeDesc desc;
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masm.GetCode(&desc);
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Handle<Code> code = isolate->factory()->NewCode(
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desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
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Simulator::CallArgument args[] = {
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Simulator::CallArgument(reinterpret_cast<uintptr_t>(test_data)),
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Simulator::CallArgument::End()};
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Simulator::current(isolate)->CallVoid(code->entry(), args);
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return Simulator::current(isolate)->wreg(0);
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}
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class MemoryAccessThread : public v8::base::Thread {
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public:
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MemoryAccessThread()
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: Thread(Options("MemoryAccessThread")),
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test_data_(NULL),
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is_finished_(false),
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has_request_(false),
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did_request_(false) {}
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virtual void Run() {
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v8::Isolate::CreateParams create_params;
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create_params.array_buffer_allocator = CcTest::array_buffer_allocator();
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v8::Isolate* isolate = v8::Isolate::New(create_params);
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Isolate* i_isolate = reinterpret_cast<Isolate*>(isolate);
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v8::Isolate::Scope scope(isolate);
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v8::base::LockGuard<v8::base::Mutex> lock_guard(&mutex_);
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while (!is_finished_) {
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while (!(has_request_ || is_finished_)) {
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has_request_cv_.Wait(&mutex_);
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}
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if (is_finished_) {
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break;
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}
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ExecuteMemoryAccess(i_isolate, test_data_, access_);
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has_request_ = false;
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did_request_ = true;
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did_request_cv_.NotifyOne();
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}
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}
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void NextAndWait(TestData* test_data, MemoryAccess access) {
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DCHECK(!has_request_);
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v8::base::LockGuard<v8::base::Mutex> lock_guard(&mutex_);
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test_data_ = test_data;
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access_ = access;
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has_request_ = true;
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has_request_cv_.NotifyOne();
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while (!did_request_) {
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did_request_cv_.Wait(&mutex_);
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}
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did_request_ = false;
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}
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void Finish() {
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v8::base::LockGuard<v8::base::Mutex> lock_guard(&mutex_);
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is_finished_ = true;
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has_request_cv_.NotifyOne();
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}
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private:
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TestData* test_data_;
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MemoryAccess access_;
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bool is_finished_;
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bool has_request_;
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bool did_request_;
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v8::base::Mutex mutex_;
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v8::base::ConditionVariable has_request_cv_;
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v8::base::ConditionVariable did_request_cv_;
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};
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TEST(simulator_invalidate_exclusive_access_threaded) {
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using Kind = MemoryAccess::Kind;
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using Size = MemoryAccess::Size;
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Isolate* isolate = CcTest::i_isolate();
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HandleScope scope(isolate);
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TestData test_data(1);
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MemoryAccessThread thread;
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thread.Start();
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MemoryAccess ldaxr_w(Kind::LoadExcl, Size::Word, offsetof(TestData, w));
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MemoryAccess stlxr_w(Kind::StoreExcl, Size::Word, offsetof(TestData, w), 7);
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// Exclusive store completed by another thread first.
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test_data = TestData(1);
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thread.NextAndWait(&test_data, MemoryAccess(Kind::LoadExcl, Size::Word,
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offsetof(TestData, w)));
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ExecuteMemoryAccess(isolate, &test_data, ldaxr_w);
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thread.NextAndWait(&test_data, MemoryAccess(Kind::StoreExcl, Size::Word,
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offsetof(TestData, w), 5));
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CHECK_EQ(1, ExecuteMemoryAccess(isolate, &test_data, stlxr_w));
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CHECK_EQ(5, test_data.w);
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// Exclusive store completed by another thread; different address, but masked
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// to same
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test_data = TestData(1);
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ExecuteMemoryAccess(isolate, &test_data, ldaxr_w);
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thread.NextAndWait(&test_data, MemoryAccess(Kind::LoadExcl, Size::Word,
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offsetof(TestData, dummy)));
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thread.NextAndWait(&test_data, MemoryAccess(Kind::StoreExcl, Size::Word,
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offsetof(TestData, dummy), 5));
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CHECK_EQ(1, ExecuteMemoryAccess(isolate, &test_data, stlxr_w));
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CHECK_EQ(1, test_data.w);
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// Test failure when store between ldaxr/stlxr.
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test_data = TestData(1);
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ExecuteMemoryAccess(isolate, &test_data, ldaxr_w);
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||
|
|
thread.NextAndWait(&test_data, MemoryAccess(Kind::Store, Size::Word,
|
||
|
|
offsetof(TestData, dummy)));
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||
|
|
CHECK_EQ(1, ExecuteMemoryAccess(isolate, &test_data, stlxr_w));
|
||
|
|
CHECK_EQ(1, test_data.w);
|
||
|
|
|
||
|
|
thread.Finish();
|
||
|
|
thread.Join();
|
||
|
|
}
|
||
|
|
|
||
|
|
#undef __
|
||
|
|
|
||
|
|
#endif // USE_SIMULATOR
|