Initial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Review URL: http://codereview.chromium.org/264067
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3073 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 12:42:16 +00:00
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// Copyright 2009 the V8 project authors. All rights reserved.
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following
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// disclaimer in the documentation and/or other materials provided
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// with the distribution.
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// * Neither the name of Google Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include "v8.h"
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#include "codegen-inl.h"
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#include "fast-codegen.h"
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namespace v8 {
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namespace internal {
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#define __ ACCESS_MASM(masm_)
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// Generate code for a JS function. On entry to the function the receiver
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// and arguments have been pushed on the stack left to right. The actual
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// argument count matches the formal parameter count expected by the
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// function.
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//
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// The live registers are:
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// o r1: the JS function object being called (ie, ourselves)
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// o cp: our context
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// o fp: our caller's frame pointer
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// o sp: stack pointer
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// o lr: return address
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//
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// The function builds a JS frame. Please see JavaScriptFrameConstants in
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// frames-arm.h for its layout.
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void FastCodeGenerator::Generate(FunctionLiteral* fun) {
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function_ = fun;
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2009-10-15 15:27:37 +00:00
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// ARM does NOT call SetFunctionPosition.
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Initial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Review URL: http://codereview.chromium.org/264067
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3073 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 12:42:16 +00:00
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__ stm(db_w, sp, r1.bit() | cp.bit() | fp.bit() | lr.bit());
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// Adjust fp to point to caller's fp.
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__ add(fp, sp, Operand(2 * kPointerSize));
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{ Comment cmnt(masm_, "[ Allocate locals");
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int locals_count = fun->scope()->num_stack_slots();
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if (locals_count > 0) {
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__ LoadRoot(ip, Heap::kUndefinedValueRootIndex);
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}
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if (FLAG_check_stack) {
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__ LoadRoot(r2, Heap::kStackLimitRootIndex);
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}
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for (int i = 0; i < locals_count; i++) {
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__ push(ip);
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}
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}
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if (FLAG_check_stack) {
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// Put the lr setup instruction in the delay slot. The kInstrSize is
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// added to the implicit 8 byte offset that always applies to operations
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// with pc and gives a return address 12 bytes down.
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Comment cmnt(masm_, "[ Stack check");
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__ add(lr, pc, Operand(Assembler::kInstrSize));
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__ cmp(sp, Operand(r2));
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StackCheckStub stub;
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__ mov(pc,
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Operand(reinterpret_cast<intptr_t>(stub.GetCode().location()),
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RelocInfo::CODE_TARGET),
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LeaveCC,
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lo);
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}
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{ Comment cmnt(masm_, "[ Body");
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VisitStatements(fun->body());
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}
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{ Comment cmnt(masm_, "[ return <undefined>;");
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// Emit a 'return undefined' in case control fell off the end of the
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// body.
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__ LoadRoot(r0, Heap::kUndefinedValueRootIndex);
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2009-10-15 15:27:37 +00:00
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SetReturnPosition(fun);
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Initial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Review URL: http://codereview.chromium.org/264067
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3073 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 12:42:16 +00:00
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__ RecordJSReturn();
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__ mov(sp, fp);
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__ ldm(ia_w, sp, fp.bit() | lr.bit());
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int num_parameters = function_->scope()->num_parameters();
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__ add(sp, sp, Operand((num_parameters + 1) * kPointerSize));
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__ Jump(lr);
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}
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}
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void FastCodeGenerator::VisitExpressionStatement(ExpressionStatement* stmt) {
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Comment cmnt(masm_, "[ ExpressionStatement");
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2009-10-15 15:27:37 +00:00
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SetStatementPosition(stmt);
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Initial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Review URL: http://codereview.chromium.org/264067
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3073 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 12:42:16 +00:00
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Visit(stmt->expression());
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}
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void FastCodeGenerator::VisitReturnStatement(ReturnStatement* stmt) {
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Comment cmnt(masm_, "[ ReturnStatement");
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2009-10-15 15:27:37 +00:00
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SetStatementPosition(stmt);
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2009-10-19 10:36:42 +00:00
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Expression* expr = stmt->expression();
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Visit(expr);
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// Complete the statement based on the location of the subexpression.
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Location source = expr->location();
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ASSERT(!source.is_nowhere());
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if (source.is_temporary()) {
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__ pop(r0);
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} else {
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ASSERT(source.is_constant());
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ASSERT(expr->AsLiteral() != NULL);
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__ mov(r0, Operand(expr->AsLiteral()->handle()));
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}
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Initial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Review URL: http://codereview.chromium.org/264067
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3073 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 12:42:16 +00:00
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__ RecordJSReturn();
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__ mov(sp, fp);
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__ ldm(ia_w, sp, fp.bit() | lr.bit());
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int num_parameters = function_->scope()->num_parameters();
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__ add(sp, sp, Operand((num_parameters + 1) * kPointerSize));
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__ Jump(lr);
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}
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2009-10-16 09:46:09 +00:00
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void FastCodeGenerator::VisitVariableProxy(VariableProxy* expr) {
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Comment cmnt(masm_, "[ VariableProxy");
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Expression* rewrite = expr->var()->rewrite();
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ASSERT(rewrite != NULL);
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Slot* slot = rewrite->AsSlot();
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ASSERT(slot != NULL);
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{ Comment cmnt(masm_, "[ Slot");
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if (expr->location().is_temporary()) {
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__ ldr(ip, MemOperand(fp, SlotOffset(slot)));
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__ push(ip);
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} else {
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ASSERT(expr->location().is_nowhere());
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}
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Added first support for tracking locations of expressions in the
fast-mode code generator.
AST expression nodes are annotated with a location when doing the
initial syntactic check of the AST. In the current implementation,
expression locations are 'temporary' (ie, allocated to the stack) or
'nowhere' (ie, the expression's value is not needed though it must be
evaluated for side effects).
For the assignment '.result = true' on IA32, we had before (with the
true value already on top of the stack):
32 mov eax,[esp]
35 mov [ebp+0xf4],eax
38 pop eax
Now:
32 pop [ebp+0xf4]
======== On x64, before:
37 movq rax,[rsp]
41 movq [rbp-0x18],rax
45 pop rax
Now:
37 pop [rbp-0x18]
======== On ARM, before (with the true value in register ip):
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
Now:
36 str ip, [fp, #-12]
Review URL: http://codereview.chromium.org/267118
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3076 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 16:42:22 +00:00
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}
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Initial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Review URL: http://codereview.chromium.org/264067
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3073 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 12:42:16 +00:00
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}
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void FastCodeGenerator::VisitAssignment(Assignment* expr) {
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Comment cmnt(masm_, "[ Assignment");
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ASSERT(expr->op() == Token::ASSIGN || expr->op() == Token::INIT_VAR);
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2009-10-19 10:36:42 +00:00
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Expression* rhs = expr->value();
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Visit(rhs);
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Initial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Review URL: http://codereview.chromium.org/264067
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3073 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 12:42:16 +00:00
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Added support for assignments to global variables in the toplevel code
generator. We use the normal store IC mechanism with the global
object as the receiver. The following code is generated for 'x=true'
at toplevel.
======== IA32:
27 mov eax,0xf5d06161 ;; object: 0xf5d06161 <true>
32 mov ecx,0xf5d09c35 ;; object: 0xf5d09c35 <String[1]: x>
37 push [esi+0x17]
40 call StoreIC_Initialize (0xf5ce75c0) ;; code: STORE_IC, UNINITIALIZED
45 mov [esp],eax
======== X64:
25 movq rax,0x7f867a7b6199 ;; object: 0x7f867a7b6199 <true>
35 movq rcx,0x7f867a7bae71 ;; object: 0x7f867a7bae71 <String[1]: x>
45 push [rsi+0x2f]
49 call StoreIC_Initialize (0x7f8655929ac0) ;; code: STORE_IC, UNINITIALIZED
54 movq [rsp],rax
======== ARM:
32 e59f0054 ldr r0, [pc, #+84] ;; object: 0xf5b78161 <true>
36 e59f2054 ldr r2, [pc, #+84] ;; object: 0xf5b7bc35 <String[1]: x>
40 e598c017 ldr ip, [r8, #+23]
44 e52dc004 str ip, [sp, #-4]!
48 e1a0e00f mov lr, pc
52 e59ff048 ldr pc, [pc, #+72] ;; debug: statement 0
;; code: STORE_IC, UNINITIALIZED
56 e58d0000 str r0, [sp, #+0]
Review URL: http://codereview.chromium.org/305005
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3095 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-20 13:37:26 +00:00
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// Left-hand side can only be a global or a (parameter or local) slot.
|
Initial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Review URL: http://codereview.chromium.org/264067
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3073 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 12:42:16 +00:00
|
|
|
Variable* var = expr->target()->AsVariableProxy()->AsVariable();
|
Added support for assignments to global variables in the toplevel code
generator. We use the normal store IC mechanism with the global
object as the receiver. The following code is generated for 'x=true'
at toplevel.
======== IA32:
27 mov eax,0xf5d06161 ;; object: 0xf5d06161 <true>
32 mov ecx,0xf5d09c35 ;; object: 0xf5d09c35 <String[1]: x>
37 push [esi+0x17]
40 call StoreIC_Initialize (0xf5ce75c0) ;; code: STORE_IC, UNINITIALIZED
45 mov [esp],eax
======== X64:
25 movq rax,0x7f867a7b6199 ;; object: 0x7f867a7b6199 <true>
35 movq rcx,0x7f867a7bae71 ;; object: 0x7f867a7bae71 <String[1]: x>
45 push [rsi+0x2f]
49 call StoreIC_Initialize (0x7f8655929ac0) ;; code: STORE_IC, UNINITIALIZED
54 movq [rsp],rax
======== ARM:
32 e59f0054 ldr r0, [pc, #+84] ;; object: 0xf5b78161 <true>
36 e59f2054 ldr r2, [pc, #+84] ;; object: 0xf5b7bc35 <String[1]: x>
40 e598c017 ldr ip, [r8, #+23]
44 e52dc004 str ip, [sp, #-4]!
48 e1a0e00f mov lr, pc
52 e59ff048 ldr pc, [pc, #+72] ;; debug: statement 0
;; code: STORE_IC, UNINITIALIZED
56 e58d0000 str r0, [sp, #+0]
Review URL: http://codereview.chromium.org/305005
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3095 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-20 13:37:26 +00:00
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ASSERT(var != NULL);
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ASSERT(var->is_global() || var->slot() != NULL);
|
Added first support for tracking locations of expressions in the
fast-mode code generator.
AST expression nodes are annotated with a location when doing the
initial syntactic check of the AST. In the current implementation,
expression locations are 'temporary' (ie, allocated to the stack) or
'nowhere' (ie, the expression's value is not needed though it must be
evaluated for side effects).
For the assignment '.result = true' on IA32, we had before (with the
true value already on top of the stack):
32 mov eax,[esp]
35 mov [ebp+0xf4],eax
38 pop eax
Now:
32 pop [ebp+0xf4]
======== On x64, before:
37 movq rax,[rsp]
41 movq [rbp-0x18],rax
45 pop rax
Now:
37 pop [rbp-0x18]
======== On ARM, before (with the true value in register ip):
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
Now:
36 str ip, [fp, #-12]
Review URL: http://codereview.chromium.org/267118
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3076 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 16:42:22 +00:00
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2009-10-19 10:36:42 +00:00
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// Complete the assignment based on the location of the right-hand-side
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// value and the desired location of the assignment value.
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Location destination = expr->location();
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Location source = rhs->location();
|
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ASSERT(!destination.is_constant());
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ASSERT(!source.is_nowhere());
|
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|
|
|
Added support for assignments to global variables in the toplevel code
generator. We use the normal store IC mechanism with the global
object as the receiver. The following code is generated for 'x=true'
at toplevel.
======== IA32:
27 mov eax,0xf5d06161 ;; object: 0xf5d06161 <true>
32 mov ecx,0xf5d09c35 ;; object: 0xf5d09c35 <String[1]: x>
37 push [esi+0x17]
40 call StoreIC_Initialize (0xf5ce75c0) ;; code: STORE_IC, UNINITIALIZED
45 mov [esp],eax
======== X64:
25 movq rax,0x7f867a7b6199 ;; object: 0x7f867a7b6199 <true>
35 movq rcx,0x7f867a7bae71 ;; object: 0x7f867a7bae71 <String[1]: x>
45 push [rsi+0x2f]
49 call StoreIC_Initialize (0x7f8655929ac0) ;; code: STORE_IC, UNINITIALIZED
54 movq [rsp],rax
======== ARM:
32 e59f0054 ldr r0, [pc, #+84] ;; object: 0xf5b78161 <true>
36 e59f2054 ldr r2, [pc, #+84] ;; object: 0xf5b7bc35 <String[1]: x>
40 e598c017 ldr ip, [r8, #+23]
44 e52dc004 str ip, [sp, #-4]!
48 e1a0e00f mov lr, pc
52 e59ff048 ldr pc, [pc, #+72] ;; debug: statement 0
;; code: STORE_IC, UNINITIALIZED
56 e58d0000 str r0, [sp, #+0]
Review URL: http://codereview.chromium.org/305005
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3095 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-20 13:37:26 +00:00
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if (var->is_global()) {
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|
|
// Assignment to a global variable, use inline caching. Right-hand-side
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|
|
// value is passed in r0, variable name in r2, and the global object on
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// the stack.
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if (source.is_temporary()) {
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__ pop(r0);
|
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} else {
|
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ASSERT(source.is_constant());
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ASSERT(rhs->AsLiteral() != NULL);
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__ mov(r0, Operand(rhs->AsLiteral()->handle()));
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}
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__ mov(r2, Operand(var->name()));
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__ ldr(ip, CodeGenerator::GlobalObject());
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__ push(ip);
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Handle<Code> ic(Builtins::builtin(Builtins::StoreIC_Initialize));
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__ Call(ic, RelocInfo::CODE_TARGET);
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// Overwrite the global object on the stack with the result if needed.
|
2009-10-19 10:36:42 +00:00
|
|
|
if (destination.is_temporary()) {
|
Added support for assignments to global variables in the toplevel code
generator. We use the normal store IC mechanism with the global
object as the receiver. The following code is generated for 'x=true'
at toplevel.
======== IA32:
27 mov eax,0xf5d06161 ;; object: 0xf5d06161 <true>
32 mov ecx,0xf5d09c35 ;; object: 0xf5d09c35 <String[1]: x>
37 push [esi+0x17]
40 call StoreIC_Initialize (0xf5ce75c0) ;; code: STORE_IC, UNINITIALIZED
45 mov [esp],eax
======== X64:
25 movq rax,0x7f867a7b6199 ;; object: 0x7f867a7b6199 <true>
35 movq rcx,0x7f867a7bae71 ;; object: 0x7f867a7bae71 <String[1]: x>
45 push [rsi+0x2f]
49 call StoreIC_Initialize (0x7f8655929ac0) ;; code: STORE_IC, UNINITIALIZED
54 movq [rsp],rax
======== ARM:
32 e59f0054 ldr r0, [pc, #+84] ;; object: 0xf5b78161 <true>
36 e59f2054 ldr r2, [pc, #+84] ;; object: 0xf5b7bc35 <String[1]: x>
40 e598c017 ldr ip, [r8, #+23]
44 e52dc004 str ip, [sp, #-4]!
48 e1a0e00f mov lr, pc
52 e59ff048 ldr pc, [pc, #+72] ;; debug: statement 0
;; code: STORE_IC, UNINITIALIZED
56 e58d0000 str r0, [sp, #+0]
Review URL: http://codereview.chromium.org/305005
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3095 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-20 13:37:26 +00:00
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__ str(r0, MemOperand(sp));
|
2009-10-19 10:36:42 +00:00
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} else {
|
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ASSERT(destination.is_nowhere());
|
Added support for assignments to global variables in the toplevel code
generator. We use the normal store IC mechanism with the global
object as the receiver. The following code is generated for 'x=true'
at toplevel.
======== IA32:
27 mov eax,0xf5d06161 ;; object: 0xf5d06161 <true>
32 mov ecx,0xf5d09c35 ;; object: 0xf5d09c35 <String[1]: x>
37 push [esi+0x17]
40 call StoreIC_Initialize (0xf5ce75c0) ;; code: STORE_IC, UNINITIALIZED
45 mov [esp],eax
======== X64:
25 movq rax,0x7f867a7b6199 ;; object: 0x7f867a7b6199 <true>
35 movq rcx,0x7f867a7bae71 ;; object: 0x7f867a7bae71 <String[1]: x>
45 push [rsi+0x2f]
49 call StoreIC_Initialize (0x7f8655929ac0) ;; code: STORE_IC, UNINITIALIZED
54 movq [rsp],rax
======== ARM:
32 e59f0054 ldr r0, [pc, #+84] ;; object: 0xf5b78161 <true>
36 e59f2054 ldr r2, [pc, #+84] ;; object: 0xf5b7bc35 <String[1]: x>
40 e598c017 ldr ip, [r8, #+23]
44 e52dc004 str ip, [sp, #-4]!
48 e1a0e00f mov lr, pc
52 e59ff048 ldr pc, [pc, #+72] ;; debug: statement 0
;; code: STORE_IC, UNINITIALIZED
56 e58d0000 str r0, [sp, #+0]
Review URL: http://codereview.chromium.org/305005
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3095 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-20 13:37:26 +00:00
|
|
|
__ pop();
|
2009-10-19 10:36:42 +00:00
|
|
|
}
|
Added support for assignments to global variables in the toplevel code
generator. We use the normal store IC mechanism with the global
object as the receiver. The following code is generated for 'x=true'
at toplevel.
======== IA32:
27 mov eax,0xf5d06161 ;; object: 0xf5d06161 <true>
32 mov ecx,0xf5d09c35 ;; object: 0xf5d09c35 <String[1]: x>
37 push [esi+0x17]
40 call StoreIC_Initialize (0xf5ce75c0) ;; code: STORE_IC, UNINITIALIZED
45 mov [esp],eax
======== X64:
25 movq rax,0x7f867a7b6199 ;; object: 0x7f867a7b6199 <true>
35 movq rcx,0x7f867a7bae71 ;; object: 0x7f867a7bae71 <String[1]: x>
45 push [rsi+0x2f]
49 call StoreIC_Initialize (0x7f8655929ac0) ;; code: STORE_IC, UNINITIALIZED
54 movq [rsp],rax
======== ARM:
32 e59f0054 ldr r0, [pc, #+84] ;; object: 0xf5b78161 <true>
36 e59f2054 ldr r2, [pc, #+84] ;; object: 0xf5b7bc35 <String[1]: x>
40 e598c017 ldr ip, [r8, #+23]
44 e52dc004 str ip, [sp, #-4]!
48 e1a0e00f mov lr, pc
52 e59ff048 ldr pc, [pc, #+72] ;; debug: statement 0
;; code: STORE_IC, UNINITIALIZED
56 e58d0000 str r0, [sp, #+0]
Review URL: http://codereview.chromium.org/305005
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3095 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-20 13:37:26 +00:00
|
|
|
|
Added first support for tracking locations of expressions in the
fast-mode code generator.
AST expression nodes are annotated with a location when doing the
initial syntactic check of the AST. In the current implementation,
expression locations are 'temporary' (ie, allocated to the stack) or
'nowhere' (ie, the expression's value is not needed though it must be
evaluated for side effects).
For the assignment '.result = true' on IA32, we had before (with the
true value already on top of the stack):
32 mov eax,[esp]
35 mov [ebp+0xf4],eax
38 pop eax
Now:
32 pop [ebp+0xf4]
======== On x64, before:
37 movq rax,[rsp]
41 movq [rbp-0x18],rax
45 pop rax
Now:
37 pop [rbp-0x18]
======== On ARM, before (with the true value in register ip):
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
Now:
36 str ip, [fp, #-12]
Review URL: http://codereview.chromium.org/267118
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3076 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 16:42:22 +00:00
|
|
|
} else {
|
Added support for assignments to global variables in the toplevel code
generator. We use the normal store IC mechanism with the global
object as the receiver. The following code is generated for 'x=true'
at toplevel.
======== IA32:
27 mov eax,0xf5d06161 ;; object: 0xf5d06161 <true>
32 mov ecx,0xf5d09c35 ;; object: 0xf5d09c35 <String[1]: x>
37 push [esi+0x17]
40 call StoreIC_Initialize (0xf5ce75c0) ;; code: STORE_IC, UNINITIALIZED
45 mov [esp],eax
======== X64:
25 movq rax,0x7f867a7b6199 ;; object: 0x7f867a7b6199 <true>
35 movq rcx,0x7f867a7bae71 ;; object: 0x7f867a7bae71 <String[1]: x>
45 push [rsi+0x2f]
49 call StoreIC_Initialize (0x7f8655929ac0) ;; code: STORE_IC, UNINITIALIZED
54 movq [rsp],rax
======== ARM:
32 e59f0054 ldr r0, [pc, #+84] ;; object: 0xf5b78161 <true>
36 e59f2054 ldr r2, [pc, #+84] ;; object: 0xf5b7bc35 <String[1]: x>
40 e598c017 ldr ip, [r8, #+23]
44 e52dc004 str ip, [sp, #-4]!
48 e1a0e00f mov lr, pc
52 e59ff048 ldr pc, [pc, #+72] ;; debug: statement 0
;; code: STORE_IC, UNINITIALIZED
56 e58d0000 str r0, [sp, #+0]
Review URL: http://codereview.chromium.org/305005
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3095 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-20 13:37:26 +00:00
|
|
|
if (source.is_temporary()) {
|
|
|
|
if (destination.is_temporary()) {
|
|
|
|
// Case 'temp1 <- (var = temp0)'. Preserve right-hand-side
|
|
|
|
// temporary on the stack.
|
|
|
|
__ ldr(ip, MemOperand(sp));
|
|
|
|
} else {
|
|
|
|
ASSERT(destination.is_nowhere());
|
|
|
|
// Case 'var = temp'. Discard right-hand-side temporary.
|
|
|
|
__ pop(ip);
|
|
|
|
}
|
|
|
|
__ str(ip, MemOperand(fp, SlotOffset(var->slot())));
|
|
|
|
} else {
|
|
|
|
ASSERT(source.is_constant());
|
|
|
|
ASSERT(rhs->AsLiteral() != NULL);
|
|
|
|
// Two cases: 'temp <- (var = constant)', or 'var = constant' with a
|
|
|
|
// discarded result. Always perform the assignment.
|
|
|
|
__ mov(ip, Operand(rhs->AsLiteral()->handle()));
|
|
|
|
__ str(ip, MemOperand(fp, SlotOffset(var->slot())));
|
|
|
|
if (destination.is_temporary()) {
|
|
|
|
// Case 'temp <- (var = constant)'. Save result.
|
|
|
|
__ push(ip);
|
|
|
|
}
|
2009-10-19 10:36:42 +00:00
|
|
|
}
|
Added first support for tracking locations of expressions in the
fast-mode code generator.
AST expression nodes are annotated with a location when doing the
initial syntactic check of the AST. In the current implementation,
expression locations are 'temporary' (ie, allocated to the stack) or
'nowhere' (ie, the expression's value is not needed though it must be
evaluated for side effects).
For the assignment '.result = true' on IA32, we had before (with the
true value already on top of the stack):
32 mov eax,[esp]
35 mov [ebp+0xf4],eax
38 pop eax
Now:
32 pop [ebp+0xf4]
======== On x64, before:
37 movq rax,[rsp]
41 movq [rbp-0x18],rax
45 pop rax
Now:
37 pop [rbp-0x18]
======== On ARM, before (with the true value in register ip):
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
Now:
36 str ip, [fp, #-12]
Review URL: http://codereview.chromium.org/267118
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3076 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 16:42:22 +00:00
|
|
|
}
|
Initial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Review URL: http://codereview.chromium.org/264067
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3073 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-15 12:42:16 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
} } // namespace v8::internal
|