v8/src/compiler/pipeline.h

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// Copyright 2014 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#ifndef V8_COMPILER_PIPELINE_H_
#define V8_COMPILER_PIPELINE_H_
// Clients of this interface shouldn't depend on lots of compiler internals.
// Do not include anything from src/compiler here!
#include "src/compiler.h"
namespace v8 {
namespace internal {
class RegisterConfiguration;
namespace compiler {
class CallDescriptor;
class Graph;
class InstructionSequence;
class Linkage;
class PipelineData;
class Schedule;
class Pipeline {
public:
explicit Pipeline(CompilationInfo* info) : info_(info) {}
// Run the entire pipeline and generate a handle to a code object.
Handle<Code> GenerateCode();
// Run the pipeline on a machine graph and generate code. The {schedule} must
// be valid, hence the given {graph} does not need to be schedulable.
static Handle<Code> GenerateCodeForCodeStub(Isolate* isolate,
CallDescriptor* call_descriptor,
Graph* graph, Schedule* schedule,
Code::Kind kind,
const char* debug_name);
// Run the pipeline on a machine graph and generate code. If {schedule} is
// {nullptr}, then compute a new schedule for code generation.
static Handle<Code> GenerateCodeForTesting(CompilationInfo* info,
Graph* graph,
Schedule* schedule = nullptr);
// Run just the register allocator phases.
static bool AllocateRegistersForTesting(const RegisterConfiguration* config,
InstructionSequence* sequence,
bool run_verifier);
// Run the pipeline on a machine graph and generate code. If {schedule} is
// {nullptr}, then compute a new schedule for code generation.
static Handle<Code> GenerateCodeForTesting(CompilationInfo* info,
CallDescriptor* call_descriptor,
Graph* graph,
Schedule* schedule = nullptr);
private:
CompilationInfo* info_;
PipelineData* data_;
// Helpers for executing pipeline phases.
template <typename Phase>
void Run();
template <typename Phase, typename Arg0>
void Run(Arg0 arg_0);
CompilationInfo* info() const { return info_; }
Isolate* isolate() { return info_->isolate(); }
void BeginPhaseKind(const char* phase_kind);
void RunPrintAndVerify(const char* phase, bool untyped = false);
Handle<Code> ScheduleAndGenerateCode(CallDescriptor* call_descriptor);
void AllocateRegisters(const RegisterConfiguration* config,
[turbofan] Unify referencing of stack slots Previously, it was not possible to specify StackSlotOperands for all slots in both the caller and callee stacks. Specifically, the region of the callee's stack including the saved return address, frame pointer, function pointer and context pointer could not be addressed by the register allocator/gap resolver. In preparation for better tail call support, which will use the gap resolver to reconcile outgoing parameters, this change makes it possible to address all slots on the stack, because slots in the previously inaccessible dead zone may become parameter slots for outgoing tail calls. All caller stack slots are accessible as they were before, with slot -1 corresponding to the last stack parameter. Stack slot indices >= 0 access the callee stack, with slot 0 corresponding to the callee's saved return address, 1 corresponding to the saved frame pointer, 2 corresponding to the current function context, 3 corresponding to the frame marker/JSFunction, and slots 4 and above corresponding to spill slots. The following changes were specifically needed: * Frame has been changed to explicitly manage three areas of the callee frame, the fixed header, the spill slot area, and the callee-saved register area. * Conversions from stack slot indices to fp offsets all now go through a common bottleneck: OptimizedFrame::StackSlotOffsetRelativeToFp * The generation of deoptimization translation tables has been changed to support the new stack slot indexing scheme. Crankshaft, which doesn't support the new slot numbering in its register allocator, must adapt the indexes when creating translation tables. * Callee-saved parameters are now kept below spill slots, not above, to support saving only the optimal set of used registers, which is only known after register allocation is finished and spill slots have been allocated. Review URL: https://codereview.chromium.org/1261923007 Cr-Commit-Position: refs/heads/master@{#30224}
2015-08-18 14:47:56 +00:00
CallDescriptor* descriptor, bool run_verifier);
};
} // namespace compiler
} // namespace internal
} // namespace v8
#endif // V8_COMPILER_PIPELINE_H_