[turbofan] Avoid useless sign extension after sign extended load.

TEST=unittests
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/735623002

Cr-Commit-Position: refs/heads/master@{#25388}
This commit is contained in:
Benedikt Meurer 2014-11-18 10:27:47 +01:00
parent 78cf188e18
commit 048d37017d
2 changed files with 45 additions and 0 deletions

View File

@ -250,6 +250,21 @@ Reduction MachineOperatorReducer::Reduce(Node* node) {
if (m.IsFoldable()) { // K >> K => K
return ReplaceInt32(m.left().Value() >> m.right().Value());
}
if (m.left().IsWord32Shl()) {
Int32BinopMatcher mleft(m.left().node());
if (mleft.left().IsLoad()) {
LoadRepresentation const rep =
OpParameter<LoadRepresentation>(mleft.left().node());
if (m.right().Is(24) && mleft.right().Is(24) && rep == kMachInt8) {
// Load[kMachInt8] << 24 >> 24 => Load[kMachInt8]
return Replace(mleft.left().node());
}
if (m.right().Is(16) && mleft.right().Is(16) && rep == kMachInt16) {
// Load[kMachInt16] << 16 >> 16 => Load[kMachInt8]
return Replace(mleft.left().node());
}
}
}
break;
}
case IrOpcode::kWord32Ror: {

View File

@ -644,6 +644,36 @@ TEST_F(MachineOperatorReducerTest, Word32RorWithConstants) {
}
// -----------------------------------------------------------------------------
// Word32Sar
TEST_F(MachineOperatorReducerTest, Word32SarWithWord32ShlAndLoad) {
Node* const p0 = Parameter(0);
Node* const p1 = Parameter(1);
{
Node* const l = graph()->NewNode(machine()->Load(kMachInt8), p0, p1,
graph()->start(), graph()->start());
Reduction const r = Reduce(graph()->NewNode(
machine()->Word32Sar(),
graph()->NewNode(machine()->Word32Shl(), l, Int32Constant(24)),
Int32Constant(24)));
ASSERT_TRUE(r.Changed());
EXPECT_EQ(l, r.replacement());
}
{
Node* const l = graph()->NewNode(machine()->Load(kMachInt16), p0, p1,
graph()->start(), graph()->start());
Reduction const r = Reduce(graph()->NewNode(
machine()->Word32Sar(),
graph()->NewNode(machine()->Word32Shl(), l, Int32Constant(16)),
Int32Constant(16)));
ASSERT_TRUE(r.Changed());
EXPECT_EQ(l, r.replacement());
}
}
// -----------------------------------------------------------------------------
// Word32Shl