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Fix some register names in the ia32 disassembler. Byte register and XMM register names were sometimes not used, or used where they shouldn't be.

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Review URL: http://codereview.chromium.org/6702001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7205 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
whesse@chromium.org 2011-03-16 16:11:14 +00:00
parent 351a108dfc
commit 0584aa3e32
1 changed files with 59 additions and 55 deletions
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114
src/ia32/disasm-ia32.cc
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@ -331,6 +331,7 @@ class DisassemblerIA32 {
int PrintRightOperandHelper(byte* modrmp, RegisterNameMapping register_name);
int PrintRightOperand(byte* modrmp);
int PrintRightByteOperand(byte* modrmp);
int PrintRightXMMOperand(byte* modrmp);
int PrintOperands(const char* mnem, OperandOrder op_order, byte* data);
int PrintImmediateOp(byte* data);
int F7Instruction(byte* data);
@ -367,9 +368,11 @@ void DisassemblerIA32::AppendToBuffer(const char* format, ...) {
int DisassemblerIA32::PrintRightOperandHelper(
byte* modrmp,
RegisterNameMapping register_name) {
RegisterNameMapping direct_register_name) {
int mod, regop, rm;
get_modrm(*modrmp, &mod, &regop, &rm);
RegisterNameMapping register_name = (mod == 3) ? direct_register_name :
&DisassemblerIA32::NameOfCPURegister;
switch (mod) {
case 0:
if (rm == ebp) {
@ -454,6 +457,12 @@ int DisassemblerIA32::PrintRightByteOperand(byte* modrmp) {
}
int DisassemblerIA32::PrintRightXMMOperand(byte* modrmp) {
return PrintRightOperandHelper(modrmp,
&DisassemblerIA32::NameOfXMMRegister);
}
// Returns number of bytes used including the current *data.
// Writes instruction's mnemonic, left and right operands to 'tmp_buffer_'.
int DisassemblerIA32::PrintOperands(const char* mnem,
@ -937,7 +946,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm);
if (regop == eax) {
AppendToBuffer("test_b ");
data += PrintRightOperand(data);
data += PrintRightByteOperand(data);
int32_t imm = *data;
AppendToBuffer(",0x%x", imm);
data++;
@ -1035,11 +1044,19 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
case 0xC6: // imm8
{ bool is_byte = *data == 0xC6;
data++;
AppendToBuffer("%s ", is_byte ? "mov_b" : "mov");
data += PrintRightOperand(data);
int32_t imm = is_byte ? *data : *reinterpret_cast<int32_t*>(data);
AppendToBuffer(",0x%x", imm);
data += is_byte ? 1 : 4;
if (is_byte) {
AppendToBuffer("%s ", "mov_b");
data += PrintRightByteOperand(data);
int32_t imm = *data;
AppendToBuffer(",0x%x", imm);
data++;
} else {
AppendToBuffer("%s ", "mov");
data += PrintRightOperand(data);
int32_t imm = *reinterpret_cast<int32_t*>(data);
AppendToBuffer(",0x%x", imm);
data += 4;
}
}
break;
@ -1054,7 +1071,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
default: UnimplementedInstruction();
}
AppendToBuffer("%s ", mnem);
data += PrintRightOperand(data);
data += PrintRightByteOperand(data);
int32_t imm = *data;
AppendToBuffer(",0x%x", imm);
data++;
@ -1067,9 +1084,15 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
int mod, regop, rm;
data++;
get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("%s ", is_byte ? "mov_b" : "mov");
data += PrintRightOperand(data);
AppendToBuffer(",%s", NameOfCPURegister(regop));
if (is_byte) {
AppendToBuffer("%s ", "mov_b");
data += PrintRightByteOperand(data);
AppendToBuffer(",%s", NameOfByteCPURegister(regop));
} else {
AppendToBuffer("%s ", "mov");
data += PrintRightOperand(data);
AppendToBuffer(",%s", NameOfCPURegister(regop));
}
}
break;
@ -1181,7 +1204,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("movdqa %s,", NameOfXMMRegister(regop));
data += PrintRightOperand(data);
data += PrintRightXMMOperand(data);
} else if (*data == 0x70) {
data++;
int mod, regop, rm;
@ -1224,7 +1247,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
data++;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
data += PrintRightOperand(data);
data += PrintRightXMMOperand(data);
AppendToBuffer(",%s", NameOfXMMRegister(regop));
} else if (*data == 0x7E) {
data++;
@ -1242,12 +1265,16 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
NameOfXMMRegister(rm));
data++;
} else if (*data == 0xE7) {
AppendToBuffer("movntdq ");
data++;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
data += PrintRightOperand(data);
AppendToBuffer(",%s", NameOfXMMRegister(regop));
if (mod == 3) {
AppendToBuffer("movntdq ");
data += PrintRightOperand(data);
AppendToBuffer(",%s", NameOfXMMRegister(regop));
} else {
UnimplementedInstruction();
}
} else if (*data == 0xEF) {
data++;
int mod, regop, rm;
@ -1338,14 +1365,14 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
data += 3;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
data += PrintRightOperand(data);
data += PrintRightXMMOperand(data);
AppendToBuffer(",%s", NameOfXMMRegister(regop));
} else if (b2 == 0x10) {
data += 3;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("movsd %s,", NameOfXMMRegister(regop));
data += PrintRightOperand(data);
data += PrintRightXMMOperand(data);
} else {
const char* mnem = "?";
switch (b2) {
@ -1361,27 +1388,11 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
if (b2 == 0x2A) {
if (mod != 0x3) {
AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop));
data += PrintRightOperand(data);
} else {
AppendToBuffer("%s %s,%s",
mnem,
NameOfXMMRegister(regop),
NameOfCPURegister(rm));
data++;
}
AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop));
data += PrintRightOperand(data);
} else if (b2 == 0x2C) {
if (mod != 0x3) {
AppendToBuffer("%s %s,", mnem, NameOfCPURegister(regop));
data += PrintRightOperand(data);
} else {
AppendToBuffer("%s %s,%s",
mnem,
NameOfCPURegister(regop),
NameOfXMMRegister(rm));
data++;
}
AppendToBuffer("%s %s,", mnem, NameOfCPURegister(regop));
data += PrintRightXMMOperand(data);
} else if (b2 == 0xC2) {
// Intel manual 2A, Table 3-18.
const char* const pseudo_op[] = {
@ -1400,16 +1411,8 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
NameOfXMMRegister(rm));
data += 2;
} else {
if (mod != 0x3) {
AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop));
data += PrintRightOperand(data);
} else {
AppendToBuffer("%s %s,%s",
mnem,
NameOfXMMRegister(regop),
NameOfXMMRegister(rm));
data++;
}
AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data);
}
}
} else {
@ -1421,27 +1424,28 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
if (*(data+1) == 0x0F) {
if (*(data+2) == 0x2C) {
data += 3;
data += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, data);
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("cvttss2si %s,", NameOfCPURegister(regop));
data += PrintRightXMMOperand(data);
} else if (*(data+2) == 0x5A) {
data += 3;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("cvtss2sd %s,%s",
NameOfXMMRegister(regop),
NameOfXMMRegister(rm));
data++;
AppendToBuffer("cvtss2sd %s,", NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data);
} else if (*(data+2) == 0x6F) {
data += 3;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("movdqu %s,", NameOfXMMRegister(regop));
data += PrintRightOperand(data);
data += PrintRightXMMOperand(data);
} else if (*(data+2) == 0x7F) {
AppendToBuffer("movdqu ");
data += 3;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
data += PrintRightOperand(data);
data += PrintRightXMMOperand(data);
AppendToBuffer(",%s", NameOfXMMRegister(regop));
} else {
UnimplementedInstruction();