diff --git a/src/codegen/s390/macro-assembler-s390.cc b/src/codegen/s390/macro-assembler-s390.cc index f9064445c2..87aea0fa2c 100644 --- a/src/codegen/s390/macro-assembler-s390.cc +++ b/src/codegen/s390/macro-assembler-s390.cc @@ -5115,6 +5115,48 @@ void TurboAssembler::I8x16Splat(Simd128Register dst, Register src) { vrep(dst, dst, Operand(0), Condition(0)); } +void TurboAssembler::F64x2ExtractLane(DoubleRegister dst, Simd128Register src, + uint8_t imm_lane_idx) { + vrep(dst, src, Operand(1 - imm_lane_idx), Condition(3)); +} + +void TurboAssembler::F32x4ExtractLane(DoubleRegister dst, Simd128Register src, + uint8_t imm_lane_idx) { + vrep(dst, src, Operand(3 - imm_lane_idx), Condition(2)); +} + +void TurboAssembler::I64x2ExtractLane(Register dst, Simd128Register src, + uint8_t imm_lane_idx) { + vlgv(dst, src, MemOperand(r0, 1 - imm_lane_idx), Condition(3)); +} + +void TurboAssembler::I32x4ExtractLane(Register dst, Simd128Register src, + uint8_t imm_lane_idx) { + vlgv(dst, src, MemOperand(r0, 3 - imm_lane_idx), Condition(2)); +} + +void TurboAssembler::I16x8ExtractLaneU(Register dst, Simd128Register src, + uint8_t imm_lane_idx) { + vlgv(dst, src, MemOperand(r0, 7 - imm_lane_idx), Condition(1)); +} + +void TurboAssembler::I16x8ExtractLaneS(Register dst, Simd128Register src, + uint8_t imm_lane_idx) { + vlgv(r0, src, MemOperand(r0, 7 - imm_lane_idx), Condition(1)); + lghr(dst, r0); +} + +void TurboAssembler::I8x16ExtractLaneU(Register dst, Simd128Register src, + uint8_t imm_lane_idx) { + vlgv(dst, src, MemOperand(r0, 15 - imm_lane_idx), Condition(0)); +} + +void TurboAssembler::I8x16ExtractLaneS(Register dst, Simd128Register src, + uint8_t imm_lane_idx) { + vlgv(r0, src, MemOperand(r0, 15 - imm_lane_idx), Condition(0)); + lgbr(dst, r0); +} + } // namespace internal } // namespace v8 diff --git a/src/codegen/s390/macro-assembler-s390.h b/src/codegen/s390/macro-assembler-s390.h index 51ddfd5ecb..988055c5fb 100644 --- a/src/codegen/s390/macro-assembler-s390.h +++ b/src/codegen/s390/macro-assembler-s390.h @@ -1038,6 +1038,22 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase { void I32x4Splat(Simd128Register dst, Register src); void I16x8Splat(Simd128Register dst, Register src); void I8x16Splat(Simd128Register dst, Register src); + void F64x2ExtractLane(DoubleRegister dst, Simd128Register src, + uint8_t imm_lane_idx); + void F32x4ExtractLane(DoubleRegister dst, Simd128Register src, + uint8_t imm_lane_idx); + void I64x2ExtractLane(Register dst, Simd128Register src, + uint8_t imm_lane_idx); + void I32x4ExtractLane(Register dst, Simd128Register src, + uint8_t imm_lane_idx); + void I16x8ExtractLaneU(Register dst, Simd128Register src, + uint8_t imm_lane_idx); + void I16x8ExtractLaneS(Register dst, Simd128Register src, + uint8_t imm_lane_idx); + void I8x16ExtractLaneU(Register dst, Simd128Register src, + uint8_t imm_lane_idx); + void I8x16ExtractLaneS(Register dst, Simd128Register src, + uint8_t imm_lane_idx); // --------------------------------------------------------------------------- // Pointer compression Support diff --git a/src/compiler/backend/s390/code-generator-s390.cc b/src/compiler/backend/s390/code-generator-s390.cc index c00d0855ca..515173fb0a 100644 --- a/src/compiler/backend/s390/code-generator-s390.cc +++ b/src/compiler/backend/s390/code-generator-s390.cc @@ -2498,50 +2498,26 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( SIMD_UNOP_LIST(EMIT_SIMD_UNOP) #undef EMIT_SIMD_UNOP #undef SIMD_UNOP_LIST - // vector extract element - case kS390_F64x2ExtractLane: { - __ vrep(i.OutputDoubleRegister(), i.InputSimd128Register(0), - Operand(1 - i.InputInt8(1)), Condition(3)); - break; - } - case kS390_F32x4ExtractLane: { - __ vrep(i.OutputDoubleRegister(), i.InputSimd128Register(0), - Operand(3 - i.InputInt8(1)), Condition(2)); - break; - } - case kS390_I64x2ExtractLane: { - __ vlgv(i.OutputRegister(), i.InputSimd128Register(0), - MemOperand(r0, 1 - i.InputInt8(1)), Condition(3)); - break; - } - case kS390_I32x4ExtractLane: { - __ vlgv(i.OutputRegister(), i.InputSimd128Register(0), - MemOperand(r0, 3 - i.InputInt8(1)), Condition(2)); - break; - } - case kS390_I16x8ExtractLaneU: { - __ vlgv(i.OutputRegister(), i.InputSimd128Register(0), - MemOperand(r0, 7 - i.InputInt8(1)), Condition(1)); - break; - } - case kS390_I16x8ExtractLaneS: { - __ vlgv(kScratchReg, i.InputSimd128Register(0), - MemOperand(r0, 7 - i.InputInt8(1)), Condition(1)); - __ lghr(i.OutputRegister(), kScratchReg); - break; - } - case kS390_I8x16ExtractLaneU: { - __ vlgv(i.OutputRegister(), i.InputSimd128Register(0), - MemOperand(r0, 15 - i.InputInt8(1)), Condition(0)); - break; - } - case kS390_I8x16ExtractLaneS: { - __ vlgv(kScratchReg, i.InputSimd128Register(0), - MemOperand(r0, 15 - i.InputInt8(1)), Condition(0)); - __ lgbr(i.OutputRegister(), kScratchReg); - break; - } - // vector replace element + +#define SIMD_EXTRACT_LANE_LIST(V) \ + V(F64x2ExtractLane, DoubleRegister) \ + V(F32x4ExtractLane, DoubleRegister) \ + V(I64x2ExtractLane, Register) \ + V(I32x4ExtractLane, Register) \ + V(I16x8ExtractLaneU, Register) \ + V(I16x8ExtractLaneS, Register) \ + V(I8x16ExtractLaneU, Register) \ + V(I8x16ExtractLaneS, Register) + +#define EMIT_SIMD_EXTRACT_LANE(name, dtype) \ + case kS390_##name: { \ + __ name(i.Output##dtype(), i.InputSimd128Register(0), i.InputInt8(1)); \ + break; \ + } + SIMD_EXTRACT_LANE_LIST(EMIT_SIMD_EXTRACT_LANE) +#undef EMIT_SIMD_EXTRACT_LANE +#undef SIMD_EXTRACT_LANE_LIST + // vector replace element case kS390_F64x2ReplaceLane: { Simd128Register src = i.InputSimd128Register(0); Simd128Register dst = i.OutputSimd128Register(); diff --git a/src/wasm/baseline/s390/liftoff-assembler-s390.h b/src/wasm/baseline/s390/liftoff-assembler-s390.h index 3388056a68..8bd7cfd126 100644 --- a/src/wasm/baseline/s390/liftoff-assembler-s390.h +++ b/src/wasm/baseline/s390/liftoff-assembler-s390.h @@ -2159,6 +2159,25 @@ SIMD_UNOP_LIST(EMIT_SIMD_UNOP) #undef EMIT_SIMD_UNOP #undef SIMD_UNOP_LIST +#define SIMD_EXTRACT_LANE_LIST(V) \ + V(f64x2_extract_lane, F64x2ExtractLane, fp) \ + V(f32x4_extract_lane, F32x4ExtractLane, fp) \ + V(i64x2_extract_lane, I64x2ExtractLane, gp) \ + V(i32x4_extract_lane, I32x4ExtractLane, gp) \ + V(i16x8_extract_lane_u, I16x8ExtractLaneU, gp) \ + V(i16x8_extract_lane_s, I16x8ExtractLaneS, gp) \ + V(i8x16_extract_lane_u, I8x16ExtractLaneU, gp) \ + V(i8x16_extract_lane_s, I8x16ExtractLaneS, gp) + +#define EMIT_SIMD_EXTRACT_LANE(name, op, dtype) \ + void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister src, \ + uint8_t imm_lane_idx) { \ + op(dst.dtype(), src.fp(), imm_lane_idx); \ + } +SIMD_EXTRACT_LANE_LIST(EMIT_SIMD_EXTRACT_LANE) +#undef EMIT_SIMD_EXTRACT_LANE +#undef SIMD_EXTRACT_LANE_LIST + void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr, Register offset_reg, uintptr_t offset_imm, LoadType type, @@ -2187,12 +2206,6 @@ void LiftoffAssembler::emit_i8x16_swizzle(LiftoffRegister dst, bailout(kUnsupportedArchitecture, "emit_i8x16_swizzle"); } -void LiftoffAssembler::emit_f64x2_extract_lane(LiftoffRegister dst, - LiftoffRegister lhs, - uint8_t imm_lane_idx) { - bailout(kUnsupportedArchitecture, "emit_f64x2extractlane"); -} - void LiftoffAssembler::emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, @@ -2294,12 +2307,6 @@ void LiftoffAssembler::emit_f64x2_promote_low_f32x4(LiftoffRegister dst, bailout(kSimd, "f64x2.promote_low_f32x4"); } -void LiftoffAssembler::emit_f32x4_extract_lane(LiftoffRegister dst, - LiftoffRegister lhs, - uint8_t imm_lane_idx) { - bailout(kUnsupportedArchitecture, "emit_f32x4extractlane"); -} - void LiftoffAssembler::emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, @@ -2386,12 +2393,6 @@ void LiftoffAssembler::emit_f32x4_pmax(LiftoffRegister dst, LiftoffRegister lhs, bailout(kSimd, "pmax unimplemented"); } -void LiftoffAssembler::emit_i64x2_extract_lane(LiftoffRegister dst, - LiftoffRegister lhs, - uint8_t imm_lane_idx) { - bailout(kUnsupportedArchitecture, "emit_i64x2extractlane"); -} - void LiftoffAssembler::emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, @@ -2505,12 +2506,6 @@ void LiftoffAssembler::emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst, bailout(kSimd, "i64x2_extmul_high_i32x4_u unsupported"); } -void LiftoffAssembler::emit_i32x4_extract_lane(LiftoffRegister dst, - LiftoffRegister lhs, - uint8_t imm_lane_idx) { - bailout(kUnsupportedArchitecture, "emit_i32x4extractlane"); -} - void LiftoffAssembler::emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, @@ -2754,12 +2749,6 @@ void LiftoffAssembler::emit_i16x8_max_u(LiftoffRegister dst, bailout(kUnsupportedArchitecture, "emit_i16x8_max_u"); } -void LiftoffAssembler::emit_i16x8_extract_lane_u(LiftoffRegister dst, - LiftoffRegister lhs, - uint8_t imm_lane_idx) { - bailout(kUnsupportedArchitecture, "emit_i16x8extractlane_u"); -} - void LiftoffAssembler::emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, @@ -2777,12 +2766,6 @@ void LiftoffAssembler::emit_i16x8_extadd_pairwise_i8x16_u(LiftoffRegister dst, bailout(kSimd, "i16x8.extadd_pairwise_i8x16_u"); } -void LiftoffAssembler::emit_i16x8_extract_lane_s(LiftoffRegister dst, - LiftoffRegister lhs, - uint8_t imm_lane_idx) { - bailout(kUnsupportedArchitecture, "emit_i16x8extractlane_s"); -} - void LiftoffAssembler::emit_i16x8_extmul_low_i8x16_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) { @@ -2826,18 +2809,6 @@ void LiftoffAssembler::emit_i8x16_popcnt(LiftoffRegister dst, bailout(kSimd, "i8x16.popcnt"); } -void LiftoffAssembler::emit_i8x16_extract_lane_u(LiftoffRegister dst, - LiftoffRegister lhs, - uint8_t imm_lane_idx) { - bailout(kUnsupportedArchitecture, "emit_i8x16extractlane_u"); -} - -void LiftoffAssembler::emit_i8x16_extract_lane_s(LiftoffRegister dst, - LiftoffRegister lhs, - uint8_t imm_lane_idx) { - bailout(kUnsupportedArchitecture, "emit_i8x16extractlane_s"); -} - void LiftoffAssembler::emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2,