MIPS: Port '[turbofan] Add ia32 support for 4 and 16 byte moves and swaps.'
Port of 26ecb4a1d7
TEST=mjsunit/es6/math-fround
Review-Url: https://codereview.chromium.org/2156123002
Cr-Commit-Position: refs/heads/master@{#37848}
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c372af17b7
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@ -2042,23 +2042,42 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
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__ Move(dst, src);
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} else {
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DCHECK(destination->IsFPStackSlot());
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MachineRepresentation rep =
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LocationOperand::cast(source)->representation();
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if (rep == MachineRepresentation::kFloat64) {
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__ sdc1(src, g.ToMemOperand(destination));
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} else if (rep == MachineRepresentation::kFloat32) {
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__ swc1(src, g.ToMemOperand(destination));
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} else {
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DCHECK_EQ(MachineRepresentation::kSimd128, rep);
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UNREACHABLE();
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}
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}
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} else if (source->IsFPStackSlot()) {
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DCHECK(destination->IsFPRegister() || destination->IsFPStackSlot());
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MemOperand src = g.ToMemOperand(source);
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MachineRepresentation rep = LocationOperand::cast(source)->representation();
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if (destination->IsFPRegister()) {
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LocationOperand* op = LocationOperand::cast(source);
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if (op->representation() == MachineRepresentation::kFloat64) {
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if (rep == MachineRepresentation::kFloat64) {
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__ ldc1(g.ToDoubleRegister(destination), src);
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} else {
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DCHECK_EQ(MachineRepresentation::kFloat32, op->representation());
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} else if (rep == MachineRepresentation::kFloat32) {
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__ lwc1(g.ToDoubleRegister(destination), src);
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} else {
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DCHECK_EQ(MachineRepresentation::kSimd128, rep);
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UNREACHABLE();
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}
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} else {
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FPURegister temp = kScratchDoubleReg;
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if (rep == MachineRepresentation::kFloat64) {
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__ ldc1(temp, src);
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__ sdc1(temp, g.ToMemOperand(destination));
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} else if (rep == MachineRepresentation::kFloat32) {
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__ lwc1(temp, src);
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__ swc1(temp, g.ToMemOperand(destination));
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} else {
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DCHECK_EQ(MachineRepresentation::kSimd128, rep);
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UNREACHABLE();
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}
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}
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} else {
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UNREACHABLE();
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@ -2108,17 +2127,30 @@ void CodeGenerator::AssembleSwap(InstructionOperand* source,
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} else {
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DCHECK(destination->IsFPStackSlot());
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MemOperand dst = g.ToMemOperand(destination);
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MachineRepresentation rep =
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LocationOperand::cast(source)->representation();
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if (rep == MachineRepresentation::kFloat64) {
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__ Move(temp, src);
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__ ldc1(src, dst);
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__ sdc1(temp, dst);
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} else if (rep == MachineRepresentation::kFloat32) {
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__ Move(temp, src);
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__ lwc1(src, dst);
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__ swc1(temp, dst);
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} else {
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DCHECK_EQ(MachineRepresentation::kSimd128, rep);
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UNREACHABLE();
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}
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}
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} else if (source->IsFPStackSlot()) {
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DCHECK(destination->IsFPStackSlot());
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Register temp_0 = kScratchReg;
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FPURegister temp_1 = kScratchDoubleReg;
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MemOperand src0 = g.ToMemOperand(source);
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MemOperand src1(src0.rm(), src0.offset() + kIntSize);
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MemOperand dst0 = g.ToMemOperand(destination);
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MachineRepresentation rep = LocationOperand::cast(source)->representation();
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if (rep == MachineRepresentation::kFloat64) {
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MemOperand src1(src0.rm(), src0.offset() + kIntSize);
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MemOperand dst1(dst0.rm(), dst0.offset() + kIntSize);
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__ ldc1(temp_1, dst0); // Save destination in temp_1.
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__ lw(temp_0, src0); // Then use temp_0 to copy source to destination.
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@ -2126,6 +2158,15 @@ void CodeGenerator::AssembleSwap(InstructionOperand* source,
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__ lw(temp_0, src1);
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__ sw(temp_0, dst1);
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__ sdc1(temp_1, src0);
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} else if (rep == MachineRepresentation::kFloat32) {
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__ lwc1(temp_1, dst0); // Save destination in temp_1.
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__ lw(temp_0, src0); // Then use temp_0 to copy source to destination.
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__ sw(temp_0, dst0);
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__ swc1(temp_1, src0);
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} else {
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DCHECK_EQ(MachineRepresentation::kSimd128, rep);
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UNREACHABLE();
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}
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} else {
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// No other combinations are possible.
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UNREACHABLE();
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