MIPS: Enable big endian testing.
Enabled big endian testing for MIPS32 and MIPS64. The tests are also adapted for big endian variant. TEST=cctest/test-assembler-mips[64] BUG= Review URL: https://codereview.chromium.org/1867503002 Cr-Commit-Position: refs/heads/master@{#35369}
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Ilija.Pavlovic
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@ -269,6 +269,15 @@
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'test-disasm-ppc.cc'
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],
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}],
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['v8_target_arch=="mips"', {
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'sources': [ ### gcmole(arch:mips) ###
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'test-assembler-mips.cc',
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'test-code-stubs.cc',
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'test-code-stubs-mips.cc',
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'test-disasm-mips.cc',
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'test-macro-assembler-mips.cc'
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],
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}],
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['v8_target_arch=="mipsel"', {
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'sources': [ ### gcmole(arch:mipsel) ###
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'test-assembler-mips.cc',
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@ -278,8 +287,17 @@
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'test-macro-assembler-mips.cc'
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],
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}],
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['v8_target_arch=="mips64"', {
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'sources': [ ### gcmole(arch:mips64) ###
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'test-assembler-mips64.cc',
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'test-code-stubs.cc',
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'test-code-stubs-mips64.cc',
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'test-disasm-mips64.cc',
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'test-macro-assembler-mips64.cc'
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],
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}],
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['v8_target_arch=="mips64el"', {
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'sources': [
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'sources': [ ### gcmole(arch:mips64el) ###
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'test-assembler-mips64.cc',
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'test-code-stubs.cc',
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'test-code-stubs-mips64.cc',
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@ -2048,7 +2048,7 @@ TEST(movz_movn) {
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v8::internal::CodeObjectRequired::kYes);
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typedef struct test_float {
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int64_t rt;
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int32_t rt;
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double a;
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double b;
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double bold;
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@ -1385,16 +1385,22 @@ TEST(MIPS16) {
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Isolate* isolate = CcTest::i_isolate();
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HandleScope scope(isolate);
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typedef struct {
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struct T {
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int64_t r1;
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int64_t r2;
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int64_t r3;
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int64_t r4;
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int64_t r5;
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int64_t r6;
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int64_t r7;
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int64_t r8;
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int64_t r9;
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int64_t r10;
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int64_t r11;
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int64_t r12;
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uint32_t ui;
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int32_t si;
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} T;
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};
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T t;
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Assembler assm(isolate, NULL, 0);
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@ -1423,26 +1429,25 @@ TEST(MIPS16) {
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// lh with positive data.
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__ lh(a5, MemOperand(a0, offsetof(T, ui)));
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__ sw(a5, MemOperand(a0, offsetof(T, r2)));
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__ sw(a5, MemOperand(a0, offsetof(T, r7)));
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// lh with negative data.
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__ lh(a6, MemOperand(a0, offsetof(T, si)));
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__ sw(a6, MemOperand(a0, offsetof(T, r3)));
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__ sw(a6, MemOperand(a0, offsetof(T, r8)));
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// lhu with negative data.
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__ lhu(a7, MemOperand(a0, offsetof(T, si)));
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__ sw(a7, MemOperand(a0, offsetof(T, r4)));
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__ sw(a7, MemOperand(a0, offsetof(T, r9)));
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// lb with negative data.
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__ lb(t0, MemOperand(a0, offsetof(T, si)));
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__ sw(t0, MemOperand(a0, offsetof(T, r5)));
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__ sw(t0, MemOperand(a0, offsetof(T, r10)));
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// // sh writes only 1/2 of word.
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__ lui(t1, 0x3333);
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__ ori(t1, t1, 0x3333);
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__ sw(t1, MemOperand(a0, offsetof(T, r6)));
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__ lhu(t1, MemOperand(a0, offsetof(T, si)));
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__ sh(t1, MemOperand(a0, offsetof(T, r6)));
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// sh writes only 1/2 of word.
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__ lw(a4, MemOperand(a0, offsetof(T, ui)));
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__ sh(a4, MemOperand(a0, offsetof(T, r11)));
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__ lw(a4, MemOperand(a0, offsetof(T, si)));
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__ sh(a4, MemOperand(a0, offsetof(T, r12)));
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__ jr(ra);
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__ nop();
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@ -1454,26 +1459,75 @@ TEST(MIPS16) {
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F3 f = FUNCTION_CAST<F3>(code->entry());
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t.ui = 0x44332211;
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t.si = 0x99aabbcc;
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t.r1 = 0x1111111111111111;
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t.r2 = 0x2222222222222222;
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t.r3 = 0x3333333333333333;
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t.r4 = 0x4444444444444444;
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t.r1 = 0x5555555555555555;
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t.r2 = 0x5555555555555555;
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t.r3 = 0x5555555555555555;
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t.r4 = 0x5555555555555555;
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t.r5 = 0x5555555555555555;
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t.r6 = 0x6666666666666666;
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t.r6 = 0x5555555555555555;
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t.r7 = 0x5555555555555555;
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t.r8 = 0x5555555555555555;
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t.r9 = 0x5555555555555555;
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t.r10 = 0x5555555555555555;
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t.r11 = 0x5555555555555555;
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t.r12 = 0x5555555555555555;
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Object* dummy = CALL_GENERATED_CODE(isolate, f, &t, 0, 0, 0, 0);
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USE(dummy);
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// Unsigned data, 32 & 64.
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CHECK_EQ(static_cast<int64_t>(0x1111111144332211L), t.r1);
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CHECK_EQ(static_cast<int64_t>(0x0000000000002211L), t.r2);
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if (kArchEndian == kLittle) {
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// Unsigned data, 32 & 64
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CHECK_EQ(static_cast<int64_t>(0x5555555544332211L), t.r1); // lw, sw.
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CHECK_EQ(static_cast<int64_t>(0x0000000044332211L), t.r2); // sd.
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// Signed data, 32 & 64.
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CHECK_EQ(static_cast<int64_t>(0x33333333ffffbbccL), t.r3);
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CHECK_EQ(static_cast<int64_t>(0xffffffff0000bbccL), t.r4);
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// Signed data, 32 & 64.
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CHECK_EQ(static_cast<int64_t>(0x5555555599aabbccL), t.r3); // lw, sw.
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CHECK_EQ(static_cast<int64_t>(0xffffffff99aabbccL), t.r4); // sd.
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// Signed data, 32 & 64.
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CHECK_EQ(static_cast<int64_t>(0x55555555ffffffccL), t.r5);
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CHECK_EQ(static_cast<int64_t>(0x000000003333bbccL), t.r6);
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// Signed data, 32 & 64.
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CHECK_EQ(static_cast<int64_t>(0x5555555599aabbccL), t.r5); // lwu, sw.
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CHECK_EQ(static_cast<int64_t>(0x0000000099aabbccL), t.r6); // sd.
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// lh with unsigned and signed data.
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CHECK_EQ(static_cast<int64_t>(0x5555555500002211L), t.r7); // lh, sw.
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CHECK_EQ(static_cast<int64_t>(0x55555555ffffbbccL), t.r8); // lh, sw.
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// lhu with signed data.
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CHECK_EQ(static_cast<int64_t>(0x555555550000bbccL), t.r9); // lhu, sw.
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// lb with signed data.
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CHECK_EQ(static_cast<int64_t>(0x55555555ffffffccL), t.r10); // lb, sw.
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// sh with unsigned and signed data.
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CHECK_EQ(static_cast<int64_t>(0x5555555555552211L), t.r11); // lw, sh.
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CHECK_EQ(static_cast<int64_t>(0x555555555555bbccL), t.r12); // lw, sh.
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} else {
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// Unsigned data, 32 & 64
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CHECK_EQ(static_cast<int64_t>(0x4433221155555555L), t.r1); // lw, sw.
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CHECK_EQ(static_cast<int64_t>(0x0000000044332211L), t.r2); // sd.
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// Signed data, 32 & 64.
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CHECK_EQ(static_cast<int64_t>(0x99aabbcc55555555L), t.r3); // lw, sw.
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CHECK_EQ(static_cast<int64_t>(0xffffffff99aabbccL), t.r4); // sd.
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// Signed data, 32 & 64.
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CHECK_EQ(static_cast<int64_t>(0x99aabbcc55555555L), t.r5); // lwu, sw.
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CHECK_EQ(static_cast<int64_t>(0x0000000099aabbccL), t.r6); // sd.
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// lh with unsigned and signed data.
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CHECK_EQ(static_cast<int64_t>(0x0000443355555555L), t.r7); // lh, sw.
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CHECK_EQ(static_cast<int64_t>(0xffff99aa55555555L), t.r8); // lh, sw.
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// lhu with signed data.
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CHECK_EQ(static_cast<int64_t>(0x000099aa55555555L), t.r9); // lhu, sw.
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// lb with signed data.
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CHECK_EQ(static_cast<int64_t>(0xffffff9955555555L), t.r10); // lb, sw.
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// sh with unsigned and signed data.
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CHECK_EQ(static_cast<int64_t>(0x2211555555555555L), t.r11); // lw, sh.
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CHECK_EQ(static_cast<int64_t>(0xbbcc555555555555L), t.r12); // lw, sh.
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}
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}
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@ -2162,7 +2216,7 @@ TEST(movz_movn) {
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__ ldc1(f2, MemOperand(a0, offsetof(TestFloat, a)) );
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__ lwc1(f6, MemOperand(a0, offsetof(TestFloat, c)) );
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__ lw(t0, MemOperand(a0, offsetof(TestFloat, rt)) );
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__ ld(t0, MemOperand(a0, offsetof(TestFloat, rt)));
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__ Move(f12, 0.0);
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__ Move(f10, 0.0);
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__ Move(f16, 0.0);
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@ -5559,15 +5613,22 @@ TEST(r6_ldpc) {
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uint64_t expected_res;
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};
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struct TestCaseLdpc tc[] = {
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// offset, expected_res
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{ -131072, 0x250ffffe250fffff },
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{ -4, 0x250c0006250c0007 },
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{ -1, 0x250c0000250c0001 },
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{ 0, 0x03001025ef180000 },
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{ 1, 0x2508000125080000 },
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{ 4, 0x2508000725080006 },
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{ 131071, 0x250bfffd250bfffc },
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auto doubleword = [](uint32_t word2, uint32_t word1) {
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if (kArchEndian == kLittle)
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return (static_cast<uint64_t>(word2) << 32) + word1;
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else
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return (static_cast<uint64_t>(word1) << 32) + word2;
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};
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TestCaseLdpc tc[] = {
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// offset, expected_res
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{-131072, doubleword(0x250ffffe, 0x250fffff)},
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{-4, doubleword(0x250c0006, 0x250c0007)},
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{-1, doubleword(0x250c0000, 0x250c0001)},
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{0, doubleword(0x03001025, 0xef180000)},
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{1, doubleword(0x25080001, 0x25080000)},
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{4, doubleword(0x25080007, 0x25080006)},
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{131071, doubleword(0x250bfffd, 0x250bfffc)},
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};
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size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseLdpc);
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@ -138,11 +138,21 @@
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'compiler/ia32/instruction-selector-ia32-unittest.cc',
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],
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}],
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['v8_target_arch=="mips"', {
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'sources': [ ### gcmole(arch:mips) ###
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'compiler/mips/instruction-selector-mips-unittest.cc',
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],
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}],
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['v8_target_arch=="mipsel"', {
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'sources': [ ### gcmole(arch:mipsel) ###
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'compiler/mips/instruction-selector-mips-unittest.cc',
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],
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}],
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['v8_target_arch=="mips64"', {
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'sources': [ ### gcmole(arch:mips64) ###
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'compiler/mips64/instruction-selector-mips64-unittest.cc',
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],
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}],
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['v8_target_arch=="mips64el"', {
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'sources': [ ### gcmole(arch:mips64el) ###
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'compiler/mips64/instruction-selector-mips64-unittest.cc',
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