MIPS: Enable big endian testing.
Enabled big endian testing for MIPS32 and MIPS64. The tests are also adapted for big endian variant. TEST=cctest/test-assembler-mips[64] BUG= Review URL: https://codereview.chromium.org/1867503002 Cr-Commit-Position: refs/heads/master@{#35369}
This commit is contained in:
parent
4fc4978cee
commit
0b479e4e81
@ -269,6 +269,15 @@
|
||||
'test-disasm-ppc.cc'
|
||||
],
|
||||
}],
|
||||
['v8_target_arch=="mips"', {
|
||||
'sources': [ ### gcmole(arch:mips) ###
|
||||
'test-assembler-mips.cc',
|
||||
'test-code-stubs.cc',
|
||||
'test-code-stubs-mips.cc',
|
||||
'test-disasm-mips.cc',
|
||||
'test-macro-assembler-mips.cc'
|
||||
],
|
||||
}],
|
||||
['v8_target_arch=="mipsel"', {
|
||||
'sources': [ ### gcmole(arch:mipsel) ###
|
||||
'test-assembler-mips.cc',
|
||||
@ -278,8 +287,17 @@
|
||||
'test-macro-assembler-mips.cc'
|
||||
],
|
||||
}],
|
||||
['v8_target_arch=="mips64"', {
|
||||
'sources': [ ### gcmole(arch:mips64) ###
|
||||
'test-assembler-mips64.cc',
|
||||
'test-code-stubs.cc',
|
||||
'test-code-stubs-mips64.cc',
|
||||
'test-disasm-mips64.cc',
|
||||
'test-macro-assembler-mips64.cc'
|
||||
],
|
||||
}],
|
||||
['v8_target_arch=="mips64el"', {
|
||||
'sources': [
|
||||
'sources': [ ### gcmole(arch:mips64el) ###
|
||||
'test-assembler-mips64.cc',
|
||||
'test-code-stubs.cc',
|
||||
'test-code-stubs-mips64.cc',
|
||||
|
@ -2048,7 +2048,7 @@ TEST(movz_movn) {
|
||||
v8::internal::CodeObjectRequired::kYes);
|
||||
|
||||
typedef struct test_float {
|
||||
int64_t rt;
|
||||
int32_t rt;
|
||||
double a;
|
||||
double b;
|
||||
double bold;
|
||||
|
@ -1385,16 +1385,22 @@ TEST(MIPS16) {
|
||||
Isolate* isolate = CcTest::i_isolate();
|
||||
HandleScope scope(isolate);
|
||||
|
||||
typedef struct {
|
||||
struct T {
|
||||
int64_t r1;
|
||||
int64_t r2;
|
||||
int64_t r3;
|
||||
int64_t r4;
|
||||
int64_t r5;
|
||||
int64_t r6;
|
||||
int64_t r7;
|
||||
int64_t r8;
|
||||
int64_t r9;
|
||||
int64_t r10;
|
||||
int64_t r11;
|
||||
int64_t r12;
|
||||
uint32_t ui;
|
||||
int32_t si;
|
||||
} T;
|
||||
};
|
||||
T t;
|
||||
|
||||
Assembler assm(isolate, NULL, 0);
|
||||
@ -1423,26 +1429,25 @@ TEST(MIPS16) {
|
||||
|
||||
// lh with positive data.
|
||||
__ lh(a5, MemOperand(a0, offsetof(T, ui)));
|
||||
__ sw(a5, MemOperand(a0, offsetof(T, r2)));
|
||||
__ sw(a5, MemOperand(a0, offsetof(T, r7)));
|
||||
|
||||
// lh with negative data.
|
||||
__ lh(a6, MemOperand(a0, offsetof(T, si)));
|
||||
__ sw(a6, MemOperand(a0, offsetof(T, r3)));
|
||||
__ sw(a6, MemOperand(a0, offsetof(T, r8)));
|
||||
|
||||
// lhu with negative data.
|
||||
__ lhu(a7, MemOperand(a0, offsetof(T, si)));
|
||||
__ sw(a7, MemOperand(a0, offsetof(T, r4)));
|
||||
__ sw(a7, MemOperand(a0, offsetof(T, r9)));
|
||||
|
||||
// lb with negative data.
|
||||
__ lb(t0, MemOperand(a0, offsetof(T, si)));
|
||||
__ sw(t0, MemOperand(a0, offsetof(T, r5)));
|
||||
__ sw(t0, MemOperand(a0, offsetof(T, r10)));
|
||||
|
||||
// // sh writes only 1/2 of word.
|
||||
__ lui(t1, 0x3333);
|
||||
__ ori(t1, t1, 0x3333);
|
||||
__ sw(t1, MemOperand(a0, offsetof(T, r6)));
|
||||
__ lhu(t1, MemOperand(a0, offsetof(T, si)));
|
||||
__ sh(t1, MemOperand(a0, offsetof(T, r6)));
|
||||
// sh writes only 1/2 of word.
|
||||
__ lw(a4, MemOperand(a0, offsetof(T, ui)));
|
||||
__ sh(a4, MemOperand(a0, offsetof(T, r11)));
|
||||
__ lw(a4, MemOperand(a0, offsetof(T, si)));
|
||||
__ sh(a4, MemOperand(a0, offsetof(T, r12)));
|
||||
|
||||
__ jr(ra);
|
||||
__ nop();
|
||||
@ -1454,26 +1459,75 @@ TEST(MIPS16) {
|
||||
F3 f = FUNCTION_CAST<F3>(code->entry());
|
||||
t.ui = 0x44332211;
|
||||
t.si = 0x99aabbcc;
|
||||
t.r1 = 0x1111111111111111;
|
||||
t.r2 = 0x2222222222222222;
|
||||
t.r3 = 0x3333333333333333;
|
||||
t.r4 = 0x4444444444444444;
|
||||
t.r1 = 0x5555555555555555;
|
||||
t.r2 = 0x5555555555555555;
|
||||
t.r3 = 0x5555555555555555;
|
||||
t.r4 = 0x5555555555555555;
|
||||
t.r5 = 0x5555555555555555;
|
||||
t.r6 = 0x6666666666666666;
|
||||
t.r6 = 0x5555555555555555;
|
||||
t.r7 = 0x5555555555555555;
|
||||
t.r8 = 0x5555555555555555;
|
||||
t.r9 = 0x5555555555555555;
|
||||
t.r10 = 0x5555555555555555;
|
||||
t.r11 = 0x5555555555555555;
|
||||
t.r12 = 0x5555555555555555;
|
||||
|
||||
Object* dummy = CALL_GENERATED_CODE(isolate, f, &t, 0, 0, 0, 0);
|
||||
USE(dummy);
|
||||
|
||||
// Unsigned data, 32 & 64.
|
||||
CHECK_EQ(static_cast<int64_t>(0x1111111144332211L), t.r1);
|
||||
CHECK_EQ(static_cast<int64_t>(0x0000000000002211L), t.r2);
|
||||
if (kArchEndian == kLittle) {
|
||||
// Unsigned data, 32 & 64
|
||||
CHECK_EQ(static_cast<int64_t>(0x5555555544332211L), t.r1); // lw, sw.
|
||||
CHECK_EQ(static_cast<int64_t>(0x0000000044332211L), t.r2); // sd.
|
||||
|
||||
// Signed data, 32 & 64.
|
||||
CHECK_EQ(static_cast<int64_t>(0x33333333ffffbbccL), t.r3);
|
||||
CHECK_EQ(static_cast<int64_t>(0xffffffff0000bbccL), t.r4);
|
||||
CHECK_EQ(static_cast<int64_t>(0x5555555599aabbccL), t.r3); // lw, sw.
|
||||
CHECK_EQ(static_cast<int64_t>(0xffffffff99aabbccL), t.r4); // sd.
|
||||
|
||||
// Signed data, 32 & 64.
|
||||
CHECK_EQ(static_cast<int64_t>(0x55555555ffffffccL), t.r5);
|
||||
CHECK_EQ(static_cast<int64_t>(0x000000003333bbccL), t.r6);
|
||||
CHECK_EQ(static_cast<int64_t>(0x5555555599aabbccL), t.r5); // lwu, sw.
|
||||
CHECK_EQ(static_cast<int64_t>(0x0000000099aabbccL), t.r6); // sd.
|
||||
|
||||
// lh with unsigned and signed data.
|
||||
CHECK_EQ(static_cast<int64_t>(0x5555555500002211L), t.r7); // lh, sw.
|
||||
CHECK_EQ(static_cast<int64_t>(0x55555555ffffbbccL), t.r8); // lh, sw.
|
||||
|
||||
// lhu with signed data.
|
||||
CHECK_EQ(static_cast<int64_t>(0x555555550000bbccL), t.r9); // lhu, sw.
|
||||
|
||||
// lb with signed data.
|
||||
CHECK_EQ(static_cast<int64_t>(0x55555555ffffffccL), t.r10); // lb, sw.
|
||||
|
||||
// sh with unsigned and signed data.
|
||||
CHECK_EQ(static_cast<int64_t>(0x5555555555552211L), t.r11); // lw, sh.
|
||||
CHECK_EQ(static_cast<int64_t>(0x555555555555bbccL), t.r12); // lw, sh.
|
||||
} else {
|
||||
// Unsigned data, 32 & 64
|
||||
CHECK_EQ(static_cast<int64_t>(0x4433221155555555L), t.r1); // lw, sw.
|
||||
CHECK_EQ(static_cast<int64_t>(0x0000000044332211L), t.r2); // sd.
|
||||
|
||||
// Signed data, 32 & 64.
|
||||
CHECK_EQ(static_cast<int64_t>(0x99aabbcc55555555L), t.r3); // lw, sw.
|
||||
CHECK_EQ(static_cast<int64_t>(0xffffffff99aabbccL), t.r4); // sd.
|
||||
|
||||
// Signed data, 32 & 64.
|
||||
CHECK_EQ(static_cast<int64_t>(0x99aabbcc55555555L), t.r5); // lwu, sw.
|
||||
CHECK_EQ(static_cast<int64_t>(0x0000000099aabbccL), t.r6); // sd.
|
||||
|
||||
// lh with unsigned and signed data.
|
||||
CHECK_EQ(static_cast<int64_t>(0x0000443355555555L), t.r7); // lh, sw.
|
||||
CHECK_EQ(static_cast<int64_t>(0xffff99aa55555555L), t.r8); // lh, sw.
|
||||
|
||||
// lhu with signed data.
|
||||
CHECK_EQ(static_cast<int64_t>(0x000099aa55555555L), t.r9); // lhu, sw.
|
||||
|
||||
// lb with signed data.
|
||||
CHECK_EQ(static_cast<int64_t>(0xffffff9955555555L), t.r10); // lb, sw.
|
||||
|
||||
// sh with unsigned and signed data.
|
||||
CHECK_EQ(static_cast<int64_t>(0x2211555555555555L), t.r11); // lw, sh.
|
||||
CHECK_EQ(static_cast<int64_t>(0xbbcc555555555555L), t.r12); // lw, sh.
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -2162,7 +2216,7 @@ TEST(movz_movn) {
|
||||
|
||||
__ ldc1(f2, MemOperand(a0, offsetof(TestFloat, a)) );
|
||||
__ lwc1(f6, MemOperand(a0, offsetof(TestFloat, c)) );
|
||||
__ lw(t0, MemOperand(a0, offsetof(TestFloat, rt)) );
|
||||
__ ld(t0, MemOperand(a0, offsetof(TestFloat, rt)));
|
||||
__ Move(f12, 0.0);
|
||||
__ Move(f10, 0.0);
|
||||
__ Move(f16, 0.0);
|
||||
@ -5559,15 +5613,22 @@ TEST(r6_ldpc) {
|
||||
uint64_t expected_res;
|
||||
};
|
||||
|
||||
struct TestCaseLdpc tc[] = {
|
||||
auto doubleword = [](uint32_t word2, uint32_t word1) {
|
||||
if (kArchEndian == kLittle)
|
||||
return (static_cast<uint64_t>(word2) << 32) + word1;
|
||||
else
|
||||
return (static_cast<uint64_t>(word1) << 32) + word2;
|
||||
};
|
||||
|
||||
TestCaseLdpc tc[] = {
|
||||
// offset, expected_res
|
||||
{ -131072, 0x250ffffe250fffff },
|
||||
{ -4, 0x250c0006250c0007 },
|
||||
{ -1, 0x250c0000250c0001 },
|
||||
{ 0, 0x03001025ef180000 },
|
||||
{ 1, 0x2508000125080000 },
|
||||
{ 4, 0x2508000725080006 },
|
||||
{ 131071, 0x250bfffd250bfffc },
|
||||
{-131072, doubleword(0x250ffffe, 0x250fffff)},
|
||||
{-4, doubleword(0x250c0006, 0x250c0007)},
|
||||
{-1, doubleword(0x250c0000, 0x250c0001)},
|
||||
{0, doubleword(0x03001025, 0xef180000)},
|
||||
{1, doubleword(0x25080001, 0x25080000)},
|
||||
{4, doubleword(0x25080007, 0x25080006)},
|
||||
{131071, doubleword(0x250bfffd, 0x250bfffc)},
|
||||
};
|
||||
|
||||
size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseLdpc);
|
||||
|
@ -138,11 +138,21 @@
|
||||
'compiler/ia32/instruction-selector-ia32-unittest.cc',
|
||||
],
|
||||
}],
|
||||
['v8_target_arch=="mips"', {
|
||||
'sources': [ ### gcmole(arch:mips) ###
|
||||
'compiler/mips/instruction-selector-mips-unittest.cc',
|
||||
],
|
||||
}],
|
||||
['v8_target_arch=="mipsel"', {
|
||||
'sources': [ ### gcmole(arch:mipsel) ###
|
||||
'compiler/mips/instruction-selector-mips-unittest.cc',
|
||||
],
|
||||
}],
|
||||
['v8_target_arch=="mips64"', {
|
||||
'sources': [ ### gcmole(arch:mips64) ###
|
||||
'compiler/mips64/instruction-selector-mips64-unittest.cc',
|
||||
],
|
||||
}],
|
||||
['v8_target_arch=="mips64el"', {
|
||||
'sources': [ ### gcmole(arch:mips64el) ###
|
||||
'compiler/mips64/instruction-selector-mips64-unittest.cc',
|
||||
|
Loading…
Reference in New Issue
Block a user