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MIPS: [turbofan] Initial support for Switch.

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Port feb2890711

Original commit message:
Adds Switch and Case operators to TurboFan and handles them
appropriately in instruction selection and code generation.

BUG=

Review URL: https://codereview.chromium.org/896973005

Cr-Commit-Position: refs/heads/master@{#26535}
This commit is contained in:
akos.palfi 2015-02-09 20:02:18 -08:00 committed by Commit bot
parent e094f909fc
commit 0b692450c3
1 changed files with 31 additions and 0 deletions
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31
src/compiler/mips/code-generator-mips.cc
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@ -428,6 +428,9 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
case kArchJmp:
AssembleArchJump(i.InputRpo(0));
break;
case kArchSwitch:
AssembleArchSwitch(instr);
break;
case kArchNop:
// don't emit code for nops.
break;
@ -802,6 +805,28 @@ void CodeGenerator::AssembleArchJump(BasicBlock::RpoNumber target) {
}
void CodeGenerator::AssembleArchSwitch(Instruction* instr) {
MipsOperandConverter i(this, instr);
int const kNumLabels = static_cast<int>(instr->InputCount() - 1);
v8::internal::Assembler::BlockTrampolinePoolScope block_trampoline_pool(
masm());
Label here;
__ bal(&here);
__ nop(); // Branch delay slot nop.
__ bind(&here);
__ sll(at, i.InputRegister(0), 2);
__ addu(at, at, ra);
__ lw(at, MemOperand(at, 5 * v8::internal::Assembler::kInstrSize));
__ jr(at);
__ nop(); // Branch delay slot nop.
for (int index = 0; index < kNumLabels; ++index) {
__ dd(GetLabel(i.InputRpo(index + 1)));
}
}
// Assembles boolean materializations after an instruction.
void CodeGenerator::AssembleArchBoolean(Instruction* instr,
FlagsCondition condition) {
@ -1126,6 +1151,12 @@ void CodeGenerator::AssembleSwap(InstructionOperand* source,
}
void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) {
// On 32-bit MIPS we emit the jump tables inline.
UNREACHABLE();
}
void CodeGenerator::AddNopForSmiCodeInlining() {
// Unused on 32-bit ARM. Still exists on 64-bit arm.
// TODO(plind): Unclear when this is called now. Understand, fix if needed.