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Use a different variant of CpuFeatures::FlushICache asm with clang.

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This variant avoids a constant pool entry, which can be problematic
when LTO'ing. It is also slightly shorter.

R=bmeurer@chromium.org,Jacob.Bramley@arm.com
BUG=chromium:453195
LOG=n

Review URL: https://codereview.chromium.org/986643004

Cr-Commit-Position: refs/heads/master@{#27474}
This commit is contained in:
pcc 2015-03-26 04:40:51 -07:00 committed by Commit bot
parent accbe2216e
commit 0c05bdfd09
1 changed files with 13 additions and 0 deletions
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13
src/arm/cpu-arm.cc
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@ -45,6 +45,18 @@ void CpuFeatures::FlushICache(void* start, size_t size) {
register uint32_t end asm("r1") = beg + size;
register uint32_t flg asm("r2") = 0;
#ifdef __clang__
// This variant of the asm avoids a constant pool entry, which can be
// problematic when LTO'ing. It is also slightly shorter.
register uint32_t scno asm("r7") = __ARM_NR_cacheflush;
asm volatile("svc 0\n"
:
: "r"(beg), "r"(end), "r"(flg), "r"(scno)
: "memory");
#else
// Use a different variant of the asm with GCC because some versions doesn't
// support r7 as an asm input.
asm volatile(
// This assembly works for both ARM and Thumb targets.
@ -62,6 +74,7 @@ void CpuFeatures::FlushICache(void* start, size_t size) {
: "r" (beg), "r" (end), "r" (flg), [scno] "i" (__ARM_NR_cacheflush)
: "memory");
#endif
#endif
}
} } // namespace v8::internal