AuroraMiddleware/v8
1
0
Fork 0
Code Issues 2 Pull Requests Releases Wiki Activity

MIPS: Fix popping order on ARM.

Browse Source 
Port r18291 (f5a50cf3)

BUG=
R=gergely@homejinni.com

Review URL: https://codereview.chromium.org/111933004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@18295 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
palfia@homejinni.com 2013-12-10 23:03:56 +00:00
parent 925837f0ca
commit 0d6cdf825b
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mips/stub-cache-mips.cc
View File

@ -1082,9 +1082,9 @@ class CallInterceptorCompiler BASE_EMBEDDED {
CompileCallLoadPropertyWithInterceptor(
masm, receiver, holder, name_, holder_obj,
IC::kLoadPropertyWithInterceptorOnly);
__ pop(receiver);
__ pop(name_);
__ pop(holder);
__ pop(receiver);
}
// If interceptor returns no-result sentinel, call the constant function.
__ LoadRoot(scratch, Heap::kNoInterceptorResultSentinelRootIndex);