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[mips][wasm-gc] Initial Liftoff support

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Port: bee5992a6d

Bug: v8:7748

Change-Id: I5985eaf9cfaf3786e19ac6d1678630828e4c77be
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2599397
Reviewed-by: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Auto-Submit: Liu yu <liuyu@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#71871}
This commit is contained in:
LiuYu 2020-12-23 15:52:03 +08:00 committed by Commit Bot
parent 7c243e546d
commit 0d8d133261
2 changed files with 24 additions and 6 deletions
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15
src/wasm/baseline/mips/liftoff-assembler-mips.h
View File

@ -90,6 +90,7 @@ inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base,
case ValueType::kI32:
case ValueType::kRef:
case ValueType::kOptRef:
case ValueType::kRtt:
assm->lw(dst.gp(), src);
break;
case ValueType::kI64:
@ -114,6 +115,9 @@ inline void Store(LiftoffAssembler* assm, Register base, int32_t offset,
MemOperand dst(base, offset);
switch (type.kind()) {
case ValueType::kI32:
case ValueType::kOptRef:
case ValueType::kRef:
case ValueType::kRtt:
assm->Usw(src.gp(), dst);
break;
case ValueType::kI64:
@ -717,6 +721,7 @@ void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) {
case ValueType::kI32:
case ValueType::kRef:
case ValueType::kOptRef:
case ValueType::kRtt:
sw(reg.gp(), dst);
break;
case ValueType::kI64:
@ -1491,10 +1496,14 @@ void LiftoffAssembler::emit_cond_jump(LiftoffCondition liftoff_cond,
Label* label, ValueType type,
Register lhs, Register rhs) {
Condition cond = liftoff::ToCondition(liftoff_cond);
if (rhs != no_reg) {
TurboAssembler::Branch(label, cond, lhs, Operand(rhs));
} else {
if (rhs == no_reg) {
DCHECK_EQ(type, kWasmI32);
TurboAssembler::Branch(label, cond, lhs, Operand(zero_reg));
} else {
DCHECK(type == kWasmI32 ||
(type.is_reference_type() &&
(liftoff_cond == kEqual || liftoff_cond == kUnequal)));
TurboAssembler::Branch(label, cond, lhs, Operand(rhs));
}
}

15
src/wasm/baseline/mips64/liftoff-assembler-mips64.h
View File

@ -100,6 +100,7 @@ inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src,
case ValueType::kI64:
case ValueType::kRef:
case ValueType::kOptRef:
case ValueType::kRtt:
assm->Ld(dst.gp(), src);
break;
case ValueType::kF32:
@ -124,6 +125,9 @@ inline void Store(LiftoffAssembler* assm, Register base, int32_t offset,
assm->Usw(src.gp(), dst);
break;
case ValueType::kI64:
case ValueType::kOptRef:
case ValueType::kRef:
case ValueType::kRtt:
assm->Usd(src.gp(), dst);
break;
case ValueType::kF32:
@ -652,6 +656,7 @@ void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) {
case ValueType::kI64:
case ValueType::kRef:
case ValueType::kOptRef:
case ValueType::kRtt:
Sd(reg.gp(), dst);
break;
case ValueType::kF32:
@ -1340,10 +1345,14 @@ void LiftoffAssembler::emit_cond_jump(LiftoffCondition liftoff_cond,
Label* label, ValueType type,
Register lhs, Register rhs) {
Condition cond = liftoff::ToCondition(liftoff_cond);
if (rhs != no_reg) {
TurboAssembler::Branch(label, cond, lhs, Operand(rhs));
} else {
if (rhs == no_reg) {
DCHECK(type == kWasmI32 || type == kWasmI64);
TurboAssembler::Branch(label, cond, lhs, Operand(zero_reg));
} else {
DCHECK((type == kWasmI32 || type == kWasmI64) ||
(type.is_reference_type() &&
(liftoff_cond == kEqual || liftoff_cond == kUnequal)));
TurboAssembler::Branch(label, cond, lhs, Operand(rhs));
}
}