s390: Unify Visit(Word/Float)(32/64)(Unary/Bin)Op
R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com, michael_dawson@ca.ibm.com Review-Url: https://codereview.chromium.org/2756733002 Cr-Commit-Position: refs/heads/master@{#43876}
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@ -489,6 +489,10 @@ static inline int AssembleUnaryOp(Instruction* instr, _R _r, _M _m, _I _i) {
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return AssembleOp<1>(instr, _r, _m, _i);
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}
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#define ASSEMBLE_BIN_OP(_rr, _rm, _ri) AssembleBinOp(instr, _rr, _rm, _ri)
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#define ASSEMBLE_UNARY_OP(_r, _m, _i) AssembleUnaryOp(instr, _r, _m, _i)
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#ifdef V8_TARGET_ARCH_S390X
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#define CHECK_AND_ZERO_EXT_OUTPUT(num) \
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([&](int index) { \
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DCHECK(HasImmediateInput(instr, (index))); \
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@ -496,11 +500,12 @@ static inline int AssembleUnaryOp(Instruction* instr, _R _r, _M _m, _I _i) {
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if (doZeroExt) __ LoadlW(i.OutputRegister(), i.OutputRegister()); \
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})(num)
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#define ASSEMBLE_BIN_OP(_rr, _rm, _ri) AssembleBinOp(instr, _rr, _rm, _ri)
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#define ASSEMBLE_UNARY_OP(_r, _m, _i) AssembleUnaryOp(instr, _r, _m, _i)
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#define ASSEMBLE_BIN32_OP(_rr, _rm, _ri) \
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{ CHECK_AND_ZERO_EXT_OUTPUT(AssembleBinOp(instr, _rr, _rm, _ri)); }
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#else
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#define ASSEMBLE_BIN32_OP ASSEMBLE_BIN_OP
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#define CHECK_AND_ZERO_EXT_OUTPUT(num)
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#endif
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} // namespace
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@ -1343,6 +1348,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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break;
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}
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case kS390_And32:
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// zero-ext
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if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
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ASSEMBLE_BIN32_OP(RRRInstr(nrk), RM32Instr(And), RIInstr(nilf));
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} else {
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@ -1357,6 +1363,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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}
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break;
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case kS390_Or32:
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// zero-ext
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if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
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ASSEMBLE_BIN32_OP(RRRInstr(ork), RM32Instr(Or), RIInstr(oilf));
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} else {
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@ -1371,6 +1378,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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}
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break;
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case kS390_Xor32:
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// zero-ext
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if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
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ASSEMBLE_BIN32_OP(RRRInstr(xrk), RM32Instr(Xor), RIInstr(xilf));
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} else {
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@ -1385,6 +1393,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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}
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break;
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case kS390_ShiftLeft32:
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// zero-ext
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if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
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ASSEMBLE_BIN32_OP(RRRInstr(ShiftLeft), nullInstr, RRIInstr(ShiftLeft));
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} else {
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@ -1395,6 +1404,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_BIN_OP(RRRInstr(sllg), nullInstr, RRIInstr(sllg));
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break;
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case kS390_ShiftRight32:
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// zero-ext
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if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
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ASSEMBLE_BIN32_OP(RRRInstr(srlk), nullInstr, RRIInstr(srlk));
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} else {
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@ -1405,6 +1415,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_BIN_OP(RRRInstr(srlg), nullInstr, RRIInstr(srlg));
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break;
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case kS390_ShiftRightArith32:
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// zero-ext
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if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
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ASSEMBLE_BIN32_OP(RRRInstr(srak), nullInstr, RRIInstr(srak));
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} else {
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@ -1490,6 +1501,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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}
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#endif
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case kS390_RotRight32: {
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// zero-ext
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if (HasRegisterInput(instr, 1)) {
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__ LoadComplementRR(kScratchReg, i.InputRegister(1));
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__ rll(i.OutputRegister(), i.InputRegister(0), kScratchReg);
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@ -1559,6 +1571,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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}
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break;
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case kS390_Add32: {
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// zero-ext
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if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
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ASSEMBLE_BIN32_OP(RRRInstr(ark), RM32Instr(Add32), RRIInstr(Add32));
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} else {
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@ -1580,6 +1593,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_BIN_OP(DDInstr(adbr), DMTInstr(AddFloat64), nullInstr);
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break;
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case kS390_Sub32:
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// zero-ext
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if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
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ASSEMBLE_BIN32_OP(RRRInstr(srk), RM32Instr(Sub32), RRIInstr(Sub32));
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} else {
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@ -1600,9 +1614,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_BIN_OP(DDInstr(sdbr), DMTInstr(SubFloat64), nullInstr);
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break;
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case kS390_Mul32:
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// zero-ext
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ASSEMBLE_BIN32_OP(RRInstr(Mul32), RM32Instr(Mul32), RIInstr(Mul32));
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break;
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case kS390_Mul32WithOverflow:
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// zero-ext
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ASSEMBLE_BIN32_OP(RRRInstr(Mul32WithOverflowIfCCUnequal),
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RRM32Instr(Mul32WithOverflowIfCCUnequal),
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RRIInstr(Mul32WithOverflowIfCCUnequal));
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@ -1611,12 +1627,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_BIN_OP(RRInstr(Mul64), RM64Instr(Mul64), RIInstr(Mul64));
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break;
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case kS390_MulHigh32:
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ASSEMBLE_BIN32_OP(RRRInstr(MulHigh32), RRM32Instr(MulHigh32),
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RRIInstr(MulHigh32));
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// zero-ext
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ASSEMBLE_BIN_OP(RRRInstr(MulHigh32), RRM32Instr(MulHigh32),
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RRIInstr(MulHigh32));
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break;
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case kS390_MulHighU32:
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ASSEMBLE_BIN32_OP(RRRInstr(MulHighU32), RRM32Instr(MulHighU32),
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RRIInstr(MulHighU32));
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// zero-ext
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ASSEMBLE_BIN_OP(RRRInstr(MulHighU32), RRM32Instr(MulHighU32),
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RRIInstr(MulHighU32));
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break;
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case kS390_MulFloat:
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ASSEMBLE_BIN_OP(DDInstr(meebr), DMTInstr(MulFloat32), nullInstr);
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@ -1628,14 +1646,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_BIN_OP(RRRInstr(Div64), RRM64Instr(Div64), nullInstr);
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break;
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case kS390_Div32: {
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ASSEMBLE_BIN32_OP(RRRInstr(Div32), RRM32Instr(Div32), nullInstr);
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// zero-ext
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ASSEMBLE_BIN_OP(RRRInstr(Div32), RRM32Instr(Div32), nullInstr);
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break;
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}
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case kS390_DivU64:
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ASSEMBLE_BIN_OP(RRRInstr(DivU64), RRM64Instr(DivU64), nullInstr);
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break;
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case kS390_DivU32: {
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ASSEMBLE_BIN32_OP(RRRInstr(DivU32), RRM32Instr(DivU32), nullInstr);
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// zero-ext
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ASSEMBLE_BIN_OP(RRRInstr(DivU32), RRM32Instr(DivU32), nullInstr);
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break;
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}
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case kS390_DivFloat:
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@ -1645,10 +1665,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_BIN_OP(DDInstr(ddbr), DMTInstr(DivFloat64), nullInstr);
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break;
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case kS390_Mod32:
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ASSEMBLE_BIN32_OP(RRRInstr(Mod32), RRM32Instr(Mod32), nullInstr);
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// zero-ext
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ASSEMBLE_BIN_OP(RRRInstr(Mod32), RRM32Instr(Mod32), nullInstr);
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break;
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case kS390_ModU32:
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ASSEMBLE_BIN32_OP(RRRInstr(ModU32), RRM32Instr(ModU32), nullInstr);
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// zero-ext
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ASSEMBLE_BIN_OP(RRRInstr(ModU32), RRM32Instr(ModU32), nullInstr);
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break;
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case kS390_Mod64:
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ASSEMBLE_BIN_OP(RRRInstr(Mod64), RRM64Instr(Mod64), nullInstr);
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File diff suppressed because it is too large
Load Diff
@ -5360,7 +5360,7 @@ void MacroAssembler::Popcnt32(Register dst, Register src) {
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ar(dst, r0);
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ShiftRight(r0, dst, Operand(8));
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ar(dst, r0);
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LoadlB(dst, dst);
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llgcr(dst, dst);
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}
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#ifdef V8_TARGET_ARCH_S390X
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