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PPC[liftoff]: Implement 16x8 integer dot product

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Change-Id: I900466c48c09f698722cfd021ba23bba94f5b0d9
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/4081598
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Reviewed-by: Vasili Skurydzin <vasili.skurydzin@ibm.com>
Cr-Commit-Position: refs/heads/main@{#84697}
This commit is contained in:
Milad Fa 2022-12-06 14:06:13 -05:00 committed by V8 LUCI CQ
parent 959b243e53
commit 122836d23c
4 changed files with 10 additions and 12 deletions
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7
src/codegen/ppc/macro-assembler-ppc.cc
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@ -4500,6 +4500,13 @@ void TurboAssembler::I8x16BitMask(Register dst, Simd128Register src,
} }
} }
void TurboAssembler::I32x4DotI16x8S(Simd128Register dst, Simd128Register src1,
Simd128Register src2,
Simd128Register scratch) {
vxor(scratch, scratch, scratch);
vmsumshm(dst, src1, src2, scratch);
}
void TurboAssembler::V128AnyTrue(Register dst, Simd128Register src, void TurboAssembler::V128AnyTrue(Register dst, Simd128Register src,
Register scratch1, Register scratch2, Register scratch1, Register scratch2,
Simd128Register scratch3) { Simd128Register scratch3) {

1
src/codegen/ppc/macro-assembler-ppc.h
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@ -1175,6 +1175,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
V(I32x4ExtMulHighI16x8S) \ V(I32x4ExtMulHighI16x8S) \
V(I32x4ExtMulLowI16x8U) \ V(I32x4ExtMulLowI16x8U) \
V(I32x4ExtMulHighI16x8U) \ V(I32x4ExtMulHighI16x8U) \
V(I32x4DotI16x8S) \
V(I16x8Ne) \ V(I16x8Ne) \
V(I16x8GeS) \ V(I16x8GeS) \
V(I16x8GeU) \ V(I16x8GeU) \

7
src/compiler/backend/ppc/code-generator-ppc.cc
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@ -2301,6 +2301,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
V(I32x4ExtMulHighI16x8S) \ V(I32x4ExtMulHighI16x8S) \
V(I32x4ExtMulLowI16x8U) \ V(I32x4ExtMulLowI16x8U) \
V(I32x4ExtMulHighI16x8U) \ V(I32x4ExtMulHighI16x8U) \
V(I32x4DotI16x8S) \
V(I16x8Ne) \ V(I16x8Ne) \
V(I16x8GeS) \ V(I16x8GeS) \
V(I16x8GeU) \ V(I16x8GeU) \
@ -2700,12 +2701,6 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
kScratchSimd128Reg); kScratchSimd128Reg);
break; break;
} }
case kPPC_I32x4DotI16x8S: {
__ vxor(kScratchSimd128Reg, kScratchSimd128Reg, kScratchSimd128Reg);
__ vmsumshm(i.OutputSimd128Register(), i.InputSimd128Register(0),
i.InputSimd128Register(1), kScratchSimd128Reg);
break;
}
#define ASSEMBLE_LOAD_TRANSFORM(scratch, load_instr) \ #define ASSEMBLE_LOAD_TRANSFORM(scratch, load_instr) \
AddressingMode mode = kMode_None; \ AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode); \ MemOperand operand = i.MemoryOperand(&mode); \

7
src/wasm/baseline/ppc/liftoff-assembler-ppc.h
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@ -1897,6 +1897,7 @@ SIMD_BINOP_LIST(EMIT_SIMD_BINOP)
V(i32x4_extmul_low_i16x8_u, I32x4ExtMulLowI16x8U) \ V(i32x4_extmul_low_i16x8_u, I32x4ExtMulLowI16x8U) \
V(i32x4_extmul_high_i16x8_s, I32x4ExtMulHighI16x8S) \ V(i32x4_extmul_high_i16x8_s, I32x4ExtMulHighI16x8S) \
V(i32x4_extmul_high_i16x8_u, I32x4ExtMulHighI16x8U) \ V(i32x4_extmul_high_i16x8_u, I32x4ExtMulHighI16x8U) \
V(i32x4_dot_i16x8_s, I32x4DotI16x8S) \
V(i16x8_ne, I16x8Ne) \ V(i16x8_ne, I16x8Ne) \
V(i16x8_ge_s, I16x8GeS) \ V(i16x8_ge_s, I16x8GeS) \
V(i16x8_ge_u, I16x8GeU) \ V(i16x8_ge_u, I16x8GeU) \
@ -2328,12 +2329,6 @@ void LiftoffAssembler::emit_i32x4_bitmask(LiftoffRegister dst,
I32x4BitMask(dst.gp(), src.fp().toSimd(), r0, kScratchSimd128Reg); I32x4BitMask(dst.gp(), src.fp().toSimd(), r0, kScratchSimd128Reg);
} }
void LiftoffAssembler::emit_i32x4_dot_i16x8_s(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kRelaxedSimd, "i32x4_dot_i16x8_s");
}
void LiftoffAssembler::emit_i32x4_extadd_pairwise_i16x8_s(LiftoffRegister dst, void LiftoffAssembler::emit_i32x4_extadd_pairwise_i16x8_s(LiftoffRegister dst,
LiftoffRegister src) { LiftoffRegister src) {
bailout(kSimd, "i32x4.extadd_pairwise_i16x8_s"); bailout(kSimd, "i32x4.extadd_pairwise_i16x8_s");