diff --git a/src/compiler/simplified-lowering.cc b/src/compiler/simplified-lowering.cc
index b305071988..69d1d1ac79 100644
--- a/src/compiler/simplified-lowering.cc
+++ b/src/compiler/simplified-lowering.cc
@@ -1135,10 +1135,14 @@ Node* SimplifiedLowering::OffsetMinusTagConstant(int32_t offset) {
 }
 
 
-static WriteBarrierKind ComputeWriteBarrierKind(BaseTaggedness base_is_tagged,
-                                                MachineType representation,
-                                                Type* type) {
+WriteBarrierKind SimplifiedLowering::ComputeWriteBarrierKind(
+    BaseTaggedness base_is_tagged, MachineType representation, Node* value) {
   // TODO(turbofan): skip write barriers for Smis, etc.
+  if (machine()->Is64() && value->opcode() == IrOpcode::kChangeInt32ToTagged) {
+    // TODO(bmeurer): Remove this hack once we have a way to represent "sminess"
+    // of values, either in types or representations.
+    return kNoWriteBarrier;
+  }
   if (base_is_tagged == kTaggedBase &&
       RepresentationOf(representation) == kRepTagged) {
     // Write barriers are only for writes into heap objects (i.e. tagged base).
@@ -1159,7 +1163,7 @@ void SimplifiedLowering::DoLoadField(Node* node) {
 void SimplifiedLowering::DoStoreField(Node* node) {
   const FieldAccess& access = FieldAccessOf(node->op());
   WriteBarrierKind kind = ComputeWriteBarrierKind(
-      access.base_is_tagged, access.machine_type, access.type);
+      access.base_is_tagged, access.machine_type, node->InputAt(1));
   node->set_op(
       machine()->Store(StoreRepresentation(access.machine_type, kind)));
   Node* offset = jsgraph()->IntPtrConstant(access.offset - access.tag());
@@ -1267,7 +1271,7 @@ void SimplifiedLowering::DoStoreElement(Node* node) {
   node->set_op(machine()->Store(StoreRepresentation(
       access.machine_type,
       ComputeWriteBarrierKind(access.base_is_tagged, access.machine_type,
-                              access.type))));
+                              node->InputAt(2)))));
   node->ReplaceInput(1, ComputeIndex(access, node->InputAt(1)));
 }
 
diff --git a/src/compiler/simplified-lowering.h b/src/compiler/simplified-lowering.h
index 11506e9ac0..d206254a57 100644
--- a/src/compiler/simplified-lowering.h
+++ b/src/compiler/simplified-lowering.h
@@ -57,6 +57,9 @@ class SimplifiedLowering FINAL {
   Node* IsTagged(Node* node);
   Node* Untag(Node* node);
   Node* OffsetMinusTagConstant(int32_t offset);
+  WriteBarrierKind ComputeWriteBarrierKind(BaseTaggedness base_is_tagged,
+                                           MachineType representation,
+                                           Node* value);
   Node* ComputeIndex(const ElementAccess& access, Node* const key);
   Node* StringComparison(Node* node, bool requires_ordering);
   Node* Int32Div(Node* const node);
diff --git a/test/cctest/compiler/test-simplified-lowering.cc b/test/cctest/compiler/test-simplified-lowering.cc
index a72f8bb2bb..2bd3eec463 100644
--- a/test/cctest/compiler/test-simplified-lowering.cc
+++ b/test/cctest/compiler/test-simplified-lowering.cc
@@ -1463,6 +1463,20 @@ TEST(LowerStoreField_to_store) {
     }
     CHECK_EQ(kMachineReps[i], rep.machine_type());
   }
+
+  if (t.machine()->Is64()) {
+    FieldAccess access = {kTaggedBase, FixedArrayBase::kHeaderSize,
+                          Handle<Name>::null(), Type::Any(), kMachAnyTagged};
+    Node* val = t.graph()->NewNode(t.simplified()->ChangeInt32ToTagged(), t.p0);
+    Node* store = t.graph()->NewNode(t.simplified()->StoreField(access), t.p0,
+                                     val, t.start, t.start);
+    t.Effect(store);
+    t.Lower();
+    CHECK_EQ(IrOpcode::kStore, store->opcode());
+    CHECK_EQ(val, store->InputAt(2));
+    StoreRepresentation rep = OpParameter<StoreRepresentation>(store);
+    CHECK_EQ(kNoWriteBarrier, rep.write_barrier_kind());
+  }
 }