[wasm] Refactor generation of atomic instructions
This refactors the logic for generating atomic instructions in TurboFan. Instead of duplicating code via macros, we look up all information we need from a table (via switch), and generate the respective graph from that information. This will allow to factor in changes for memory64 more easily. R=ahaas@chromium.org Bug: v8:10949 Change-Id: Ic2c78588f8ce555667f7e0220b1cc50c7074ded4 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2440831 Commit-Queue: Clemens Backes <clemensb@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#70265}
This commit is contained in:
Clemens Backes
Commit Bot
parent
74a9b9c4d8
commit
179f7f435b
@ -3630,7 +3630,7 @@ Node* WasmGraphBuilder::TableSet(uint32_t table_index, Node* index, Node* val,
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}
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Node* WasmGraphBuilder::CheckBoundsAndAlignment(
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uint8_t access_size, Node* index, uint32_t offset,
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int8_t access_size, Node* index, uint32_t offset,
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wasm::WasmCodePosition position) {
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// Atomic operations need bounds checks until the backend can emit protected
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// loads.
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@ -5019,158 +5019,173 @@ Node* WasmGraphBuilder::Simd8x16ShuffleOp(const uint8_t shuffle[16],
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inputs[0], inputs[1]);
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}
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#define ATOMIC_BINOP_LIST(V) \
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V(I32AtomicAdd, Add, Uint32, Word32) \
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V(I64AtomicAdd, Add, Uint64, Word64) \
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V(I32AtomicAdd8U, Add, Uint8, Word32) \
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V(I32AtomicAdd16U, Add, Uint16, Word32) \
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V(I64AtomicAdd8U, Add, Uint8, Word64) \
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V(I64AtomicAdd16U, Add, Uint16, Word64) \
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V(I64AtomicAdd32U, Add, Uint32, Word64) \
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V(I32AtomicSub, Sub, Uint32, Word32) \
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V(I64AtomicSub, Sub, Uint64, Word64) \
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V(I32AtomicSub8U, Sub, Uint8, Word32) \
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V(I32AtomicSub16U, Sub, Uint16, Word32) \
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V(I64AtomicSub8U, Sub, Uint8, Word64) \
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V(I64AtomicSub16U, Sub, Uint16, Word64) \
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V(I64AtomicSub32U, Sub, Uint32, Word64) \
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V(I32AtomicAnd, And, Uint32, Word32) \
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V(I64AtomicAnd, And, Uint64, Word64) \
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V(I32AtomicAnd8U, And, Uint8, Word32) \
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V(I64AtomicAnd16U, And, Uint16, Word64) \
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V(I32AtomicAnd16U, And, Uint16, Word32) \
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V(I64AtomicAnd8U, And, Uint8, Word64) \
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V(I64AtomicAnd32U, And, Uint32, Word64) \
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V(I32AtomicOr, Or, Uint32, Word32) \
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V(I64AtomicOr, Or, Uint64, Word64) \
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V(I32AtomicOr8U, Or, Uint8, Word32) \
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V(I32AtomicOr16U, Or, Uint16, Word32) \
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V(I64AtomicOr8U, Or, Uint8, Word64) \
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V(I64AtomicOr16U, Or, Uint16, Word64) \
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V(I64AtomicOr32U, Or, Uint32, Word64) \
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V(I32AtomicXor, Xor, Uint32, Word32) \
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V(I64AtomicXor, Xor, Uint64, Word64) \
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V(I32AtomicXor8U, Xor, Uint8, Word32) \
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V(I32AtomicXor16U, Xor, Uint16, Word32) \
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V(I64AtomicXor8U, Xor, Uint8, Word64) \
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V(I64AtomicXor16U, Xor, Uint16, Word64) \
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V(I64AtomicXor32U, Xor, Uint32, Word64) \
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V(I32AtomicExchange, Exchange, Uint32, Word32) \
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V(I64AtomicExchange, Exchange, Uint64, Word64) \
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V(I32AtomicExchange8U, Exchange, Uint8, Word32) \
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V(I32AtomicExchange16U, Exchange, Uint16, Word32) \
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V(I64AtomicExchange8U, Exchange, Uint8, Word64) \
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V(I64AtomicExchange16U, Exchange, Uint16, Word64) \
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V(I64AtomicExchange32U, Exchange, Uint32, Word64)
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#define ATOMIC_CMP_EXCHG_LIST(V) \
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V(I32AtomicCompareExchange, Uint32, Word32) \
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V(I64AtomicCompareExchange, Uint64, Word64) \
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V(I32AtomicCompareExchange8U, Uint8, Word32) \
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V(I32AtomicCompareExchange16U, Uint16, Word32) \
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V(I64AtomicCompareExchange8U, Uint8, Word64) \
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V(I64AtomicCompareExchange16U, Uint16, Word64) \
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V(I64AtomicCompareExchange32U, Uint32, Word64)
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#define ATOMIC_LOAD_LIST(V) \
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V(I32AtomicLoad, Uint32, Word32) \
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V(I64AtomicLoad, Uint64, Word64) \
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V(I32AtomicLoad8U, Uint8, Word32) \
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V(I32AtomicLoad16U, Uint16, Word32) \
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V(I64AtomicLoad8U, Uint8, Word64) \
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V(I64AtomicLoad16U, Uint16, Word64) \
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V(I64AtomicLoad32U, Uint32, Word64)
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#define ATOMIC_STORE_LIST(V) \
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V(I32AtomicStore, Uint32, kWord32, Word32) \
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V(I64AtomicStore, Uint64, kWord64, Word64) \
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V(I32AtomicStore8U, Uint8, kWord8, Word32) \
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V(I32AtomicStore16U, Uint16, kWord16, Word32) \
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V(I64AtomicStore8U, Uint8, kWord8, Word64) \
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V(I64AtomicStore16U, Uint16, kWord16, Word64) \
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V(I64AtomicStore32U, Uint32, kWord32, Word64)
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Node* WasmGraphBuilder::AtomicOp(wasm::WasmOpcode opcode, Node* const* inputs,
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uint32_t alignment, uint32_t offset,
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wasm::WasmCodePosition position) {
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Node* node;
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struct AtomicOpInfo {
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enum Type : int8_t {
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kNoInput = 0,
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kOneInput = 1,
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kTwoInputs = 2,
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kSpecial
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};
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using OperatorByType =
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const Operator* (MachineOperatorBuilder::*)(MachineType);
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using OperatorByRep =
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const Operator* (MachineOperatorBuilder::*)(MachineRepresentation);
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const Type type;
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const MachineType machine_type;
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const OperatorByType operator_by_type = nullptr;
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const OperatorByRep operator_by_rep = nullptr;
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constexpr AtomicOpInfo(Type t, MachineType m, OperatorByType o)
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: type(t), machine_type(m), operator_by_type(o) {}
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constexpr AtomicOpInfo(Type t, MachineType m, OperatorByRep o)
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: type(t), machine_type(m), operator_by_rep(o) {}
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// Constexpr, hence just a table lookup in most compilers.
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static constexpr AtomicOpInfo Get(wasm::WasmOpcode opcode) {
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switch (opcode) {
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#define CASE(Name, Type, MachType, Op) \
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case wasm::kExpr##Name: \
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return {Type, MachineType::MachType(), &MachineOperatorBuilder::Op};
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// Binops.
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CASE(I32AtomicAdd, kOneInput, Uint32, Word32AtomicAdd)
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CASE(I64AtomicAdd, kOneInput, Uint64, Word64AtomicAdd)
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CASE(I32AtomicAdd8U, kOneInput, Uint8, Word32AtomicAdd)
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CASE(I32AtomicAdd16U, kOneInput, Uint16, Word32AtomicAdd)
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CASE(I64AtomicAdd8U, kOneInput, Uint8, Word64AtomicAdd)
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CASE(I64AtomicAdd16U, kOneInput, Uint16, Word64AtomicAdd)
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CASE(I64AtomicAdd32U, kOneInput, Uint32, Word64AtomicAdd)
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CASE(I32AtomicSub, kOneInput, Uint32, Word32AtomicSub)
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CASE(I64AtomicSub, kOneInput, Uint64, Word64AtomicSub)
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CASE(I32AtomicSub8U, kOneInput, Uint8, Word32AtomicSub)
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CASE(I32AtomicSub16U, kOneInput, Uint16, Word32AtomicSub)
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CASE(I64AtomicSub8U, kOneInput, Uint8, Word64AtomicSub)
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CASE(I64AtomicSub16U, kOneInput, Uint16, Word64AtomicSub)
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CASE(I64AtomicSub32U, kOneInput, Uint32, Word64AtomicSub)
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CASE(I32AtomicAnd, kOneInput, Uint32, Word32AtomicAnd)
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CASE(I64AtomicAnd, kOneInput, Uint64, Word64AtomicAnd)
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CASE(I32AtomicAnd8U, kOneInput, Uint8, Word32AtomicAnd)
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CASE(I32AtomicAnd16U, kOneInput, Uint16, Word32AtomicAnd)
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CASE(I64AtomicAnd8U, kOneInput, Uint8, Word64AtomicAnd)
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CASE(I64AtomicAnd16U, kOneInput, Uint16, Word64AtomicAnd)
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CASE(I64AtomicAnd32U, kOneInput, Uint32, Word64AtomicAnd)
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CASE(I32AtomicOr, kOneInput, Uint32, Word32AtomicOr)
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CASE(I64AtomicOr, kOneInput, Uint64, Word64AtomicOr)
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CASE(I32AtomicOr8U, kOneInput, Uint8, Word32AtomicOr)
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CASE(I32AtomicOr16U, kOneInput, Uint16, Word32AtomicOr)
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CASE(I64AtomicOr8U, kOneInput, Uint8, Word64AtomicOr)
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CASE(I64AtomicOr16U, kOneInput, Uint16, Word64AtomicOr)
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CASE(I64AtomicOr32U, kOneInput, Uint32, Word64AtomicOr)
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CASE(I32AtomicXor, kOneInput, Uint32, Word32AtomicXor)
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CASE(I64AtomicXor, kOneInput, Uint64, Word64AtomicXor)
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CASE(I32AtomicXor8U, kOneInput, Uint8, Word32AtomicXor)
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CASE(I32AtomicXor16U, kOneInput, Uint16, Word32AtomicXor)
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CASE(I64AtomicXor8U, kOneInput, Uint8, Word64AtomicXor)
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CASE(I64AtomicXor16U, kOneInput, Uint16, Word64AtomicXor)
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CASE(I64AtomicXor32U, kOneInput, Uint32, Word64AtomicXor)
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CASE(I32AtomicExchange, kOneInput, Uint32, Word32AtomicExchange)
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CASE(I64AtomicExchange, kOneInput, Uint64, Word64AtomicExchange)
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CASE(I32AtomicExchange8U, kOneInput, Uint8, Word32AtomicExchange)
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CASE(I32AtomicExchange16U, kOneInput, Uint16, Word32AtomicExchange)
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CASE(I64AtomicExchange8U, kOneInput, Uint8, Word64AtomicExchange)
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CASE(I64AtomicExchange16U, kOneInput, Uint16, Word64AtomicExchange)
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CASE(I64AtomicExchange32U, kOneInput, Uint32, Word64AtomicExchange)
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// Compare-exchange.
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CASE(I32AtomicCompareExchange, kTwoInputs, Uint32,
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Word32AtomicCompareExchange)
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CASE(I64AtomicCompareExchange, kTwoInputs, Uint64,
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Word64AtomicCompareExchange)
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CASE(I32AtomicCompareExchange8U, kTwoInputs, Uint8,
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Word32AtomicCompareExchange)
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CASE(I32AtomicCompareExchange16U, kTwoInputs, Uint16,
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Word32AtomicCompareExchange)
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CASE(I64AtomicCompareExchange8U, kTwoInputs, Uint8,
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Word64AtomicCompareExchange)
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CASE(I64AtomicCompareExchange16U, kTwoInputs, Uint16,
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Word64AtomicCompareExchange)
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CASE(I64AtomicCompareExchange32U, kTwoInputs, Uint32,
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Word64AtomicCompareExchange)
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// Load.
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CASE(I32AtomicLoad, kNoInput, Uint32, Word32AtomicLoad)
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CASE(I64AtomicLoad, kNoInput, Uint64, Word64AtomicLoad)
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CASE(I32AtomicLoad8U, kNoInput, Uint8, Word32AtomicLoad)
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CASE(I32AtomicLoad16U, kNoInput, Uint16, Word32AtomicLoad)
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CASE(I64AtomicLoad8U, kNoInput, Uint8, Word64AtomicLoad)
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CASE(I64AtomicLoad16U, kNoInput, Uint16, Word64AtomicLoad)
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CASE(I64AtomicLoad32U, kNoInput, Uint32, Word64AtomicLoad)
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// Store.
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CASE(I32AtomicStore, kOneInput, Uint32, Word32AtomicStore)
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CASE(I64AtomicStore, kOneInput, Uint64, Word64AtomicStore)
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CASE(I32AtomicStore8U, kOneInput, Uint8, Word32AtomicStore)
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CASE(I32AtomicStore16U, kOneInput, Uint16, Word32AtomicStore)
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CASE(I64AtomicStore8U, kOneInput, Uint8, Word64AtomicStore)
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CASE(I64AtomicStore16U, kOneInput, Uint16, Word64AtomicStore)
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CASE(I64AtomicStore32U, kOneInput, Uint32, Word64AtomicStore)
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#undef CASE
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case wasm::kExprAtomicNotify:
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return {kSpecial, MachineType::Int32(), OperatorByType{nullptr}};
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case wasm::kExprI32AtomicWait:
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return {kSpecial, MachineType::Int32(), OperatorByType{nullptr}};
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case wasm::kExprI64AtomicWait:
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return {kSpecial, MachineType::Int64(), OperatorByType{nullptr}};
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default:
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#if V8_HAS_CXX14_CONSTEXPR
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UNREACHABLE();
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#else
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// Return something for older GCC.
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return {kSpecial, MachineType::Int64(), OperatorByType{nullptr}};
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#endif
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}
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}
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};
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AtomicOpInfo info = AtomicOpInfo::Get(opcode);
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Node* index = CheckBoundsAndAlignment(info.machine_type.MemSize(), inputs[0],
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offset, position);
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if (info.type != AtomicOpInfo::kSpecial) {
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const Operator* op =
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info.operator_by_type
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? (mcgraph()->machine()->*info.operator_by_type)(info.machine_type)
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: (mcgraph()->machine()->*info.operator_by_rep)(
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info.machine_type.representation());
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Node* input_nodes[6] = {MemBuffer(offset), index};
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int num_actual_inputs = info.type;
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std::copy_n(inputs + 1, num_actual_inputs, input_nodes + 2);
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input_nodes[num_actual_inputs + 2] = effect();
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input_nodes[num_actual_inputs + 3] = control();
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return gasm_->AddNode(
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graph()->NewNode(op, num_actual_inputs + 4, input_nodes));
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}
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// After we've bounds-checked, compute the effective address.
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Node* address = graph()->NewNode(mcgraph()->machine()->Int32Add(),
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Uint32Constant(offset), index);
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switch (opcode) {
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#define BUILD_ATOMIC_BINOP(Name, Operation, Type, Prefix) \
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case wasm::kExpr##Name: { \
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Node* index = CheckBoundsAndAlignment(MachineType::Type().MemSize(), \
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inputs[0], offset, position); \
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node = graph()->NewNode( \
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mcgraph()->machine()->Prefix##Atomic##Operation(MachineType::Type()), \
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MemBuffer(offset), index, inputs[1], effect(), control()); \
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break; \
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}
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ATOMIC_BINOP_LIST(BUILD_ATOMIC_BINOP)
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#undef BUILD_ATOMIC_BINOP
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#define BUILD_ATOMIC_CMP_EXCHG(Name, Type, Prefix) \
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case wasm::kExpr##Name: { \
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Node* index = CheckBoundsAndAlignment(MachineType::Type().MemSize(), \
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inputs[0], offset, position); \
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node = graph()->NewNode( \
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mcgraph()->machine()->Prefix##AtomicCompareExchange( \
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MachineType::Type()), \
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MemBuffer(offset), index, inputs[1], inputs[2], effect(), control()); \
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break; \
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}
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ATOMIC_CMP_EXCHG_LIST(BUILD_ATOMIC_CMP_EXCHG)
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#undef BUILD_ATOMIC_CMP_EXCHG
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#define BUILD_ATOMIC_LOAD_OP(Name, Type, Prefix) \
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case wasm::kExpr##Name: { \
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Node* index = CheckBoundsAndAlignment(MachineType::Type().MemSize(), \
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inputs[0], offset, position); \
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node = graph()->NewNode( \
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mcgraph()->machine()->Prefix##AtomicLoad(MachineType::Type()), \
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MemBuffer(offset), index, effect(), control()); \
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break; \
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}
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ATOMIC_LOAD_LIST(BUILD_ATOMIC_LOAD_OP)
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#undef BUILD_ATOMIC_LOAD_OP
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#define BUILD_ATOMIC_STORE_OP(Name, Type, Rep, Prefix) \
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case wasm::kExpr##Name: { \
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Node* index = CheckBoundsAndAlignment(MachineType::Type().MemSize(), \
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inputs[0], offset, position); \
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node = graph()->NewNode( \
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mcgraph()->machine()->Prefix##AtomicStore(MachineRepresentation::Rep), \
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MemBuffer(offset), index, inputs[1], effect(), control()); \
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break; \
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}
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ATOMIC_STORE_LIST(BUILD_ATOMIC_STORE_OP)
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#undef BUILD_ATOMIC_STORE_OP
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case wasm::kExprAtomicNotify: {
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Node* index = CheckBoundsAndAlignment(MachineType::Uint32().MemSize(),
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inputs[0], offset, position);
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// Now that we've bounds-checked, compute the effective address.
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Node* address = graph()->NewNode(mcgraph()->machine()->Int32Add(),
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Uint32Constant(offset), index);
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WasmAtomicNotifyDescriptor interface_descriptor;
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auto call_descriptor = Linkage::GetStubCallDescriptor(
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mcgraph()->zone(), interface_descriptor,
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interface_descriptor.GetStackParameterCount(),
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CallDescriptor::kNoFlags, Operator::kNoProperties,
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StubCallMode::kCallWasmRuntimeStub);
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auto* call_descriptor =
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GetBuiltinCallDescriptor<WasmAtomicNotifyDescriptor>(
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this, StubCallMode::kCallWasmRuntimeStub);
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Node* call_target = mcgraph()->RelocatableIntPtrConstant(
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wasm::WasmCode::kWasmAtomicNotify, RelocInfo::WASM_STUB_CALL);
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node = graph()->NewNode(mcgraph()->common()->Call(call_descriptor),
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call_target, address, inputs[1], effect(),
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control());
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break;
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return gasm_->Call(call_descriptor, call_target, address, inputs[1]);
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}
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case wasm::kExprI32AtomicWait: {
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Node* index = CheckBoundsAndAlignment(MachineType::Uint32().MemSize(),
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inputs[0], offset, position);
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// Now that we've bounds-checked, compute the effective address.
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Node* address = graph()->NewNode(mcgraph()->machine()->Int32Add(),
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Uint32Constant(offset), index);
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auto call_descriptor = GetI32AtomicWaitCallDescriptor();
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auto* call_descriptor = GetI32AtomicWaitCallDescriptor();
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intptr_t target = mcgraph()->machine()->Is64()
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? wasm::WasmCode::kWasmI32AtomicWait64
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@ -5178,20 +5193,12 @@ Node* WasmGraphBuilder::AtomicOp(wasm::WasmOpcode opcode, Node* const* inputs,
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Node* call_target = mcgraph()->RelocatableIntPtrConstant(
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target, RelocInfo::WASM_STUB_CALL);
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node = graph()->NewNode(mcgraph()->common()->Call(call_descriptor),
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call_target, address, inputs[1], inputs[2],
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effect(), control());
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break;
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return gasm_->Call(call_descriptor, call_target, address, inputs[1],
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inputs[2]);
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}
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case wasm::kExprI64AtomicWait: {
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Node* index = CheckBoundsAndAlignment(MachineType::Uint64().MemSize(),
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inputs[0], offset, position);
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// Now that we've bounds-checked, compute the effective address.
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Node* address = graph()->NewNode(mcgraph()->machine()->Int32Add(),
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Uint32Constant(offset), index);
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CallDescriptor* call_descriptor = GetI64AtomicWaitCallDescriptor();
|
||||
auto* call_descriptor = GetI64AtomicWaitCallDescriptor();
|
||||
|
||||
intptr_t target = mcgraph()->machine()->Is64()
|
||||
? wasm::WasmCode::kWasmI64AtomicWait64
|
||||
@ -5199,16 +5206,13 @@ Node* WasmGraphBuilder::AtomicOp(wasm::WasmOpcode opcode, Node* const* inputs,
|
||||
Node* call_target = mcgraph()->RelocatableIntPtrConstant(
|
||||
target, RelocInfo::WASM_STUB_CALL);
|
||||
|
||||
node = graph()->NewNode(mcgraph()->common()->Call(call_descriptor),
|
||||
call_target, address, inputs[1], inputs[2],
|
||||
effect(), control());
|
||||
break;
|
||||
return gasm_->Call(call_descriptor, call_target, address, inputs[1],
|
||||
inputs[2]);
|
||||
}
|
||||
|
||||
default:
|
||||
FATAL_UNSUPPORTED_OPCODE(opcode);
|
||||
}
|
||||
return SetEffect(node);
|
||||
}
|
||||
|
||||
Node* WasmGraphBuilder::AtomicFence() {
|
||||
@ -5216,11 +5220,6 @@ Node* WasmGraphBuilder::AtomicFence() {
|
||||
effect(), control()));
|
||||
}
|
||||
|
||||
#undef ATOMIC_BINOP_LIST
|
||||
#undef ATOMIC_CMP_EXCHG_LIST
|
||||
#undef ATOMIC_LOAD_LIST
|
||||
#undef ATOMIC_STORE_LIST
|
||||
|
||||
Node* WasmGraphBuilder::MemoryInit(uint32_t data_segment_index, Node* dst,
|
||||
Node* src, Node* size,
|
||||
wasm::WasmCodePosition position) {
|
||||
|
||||
@ -470,7 +470,7 @@ class WasmGraphBuilder {
|
||||
// partially out-of-bounds, traps if it is completely out-of-bounds.
|
||||
Node* BoundsCheckMemRange(Node** start, Node** size, wasm::WasmCodePosition);
|
||||
|
||||
Node* CheckBoundsAndAlignment(uint8_t access_size, Node* index,
|
||||
Node* CheckBoundsAndAlignment(int8_t access_size, Node* index,
|
||||
uint32_t offset, wasm::WasmCodePosition);
|
||||
|
||||
Node* Uint32ToUintptr(Node*);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user