[x64][ptr-compr][turbofan] Make compressions no-ops
Since we can just use the lower bits, we can make the compressions no-ops. As a note, they still change the representation so that the machine graph verifier is happy. X64's version of: https://chromium-review.googlesource.com/c/v8/v8/+/1751722 Bug: v8:7703 Change-Id: I728eb8b6b3953f053a7042797f3c498d13e3c948 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1751729 Reviewed-by: Tobias Tebbi <tebbi@chromium.org> Commit-Queue: Santiago Aboy Solanes <solanes@chromium.org> Cr-Commit-Position: refs/heads/master@{#63202}
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@ -2019,12 +2019,6 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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EmitWordLoadPoisoningIfNeeded(this, opcode, instr, i);
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break;
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}
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case kX64CompressSigned: // Fall through.
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case kX64CompressPointer: // Fall through.
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case kX64CompressAny: {
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ASSEMBLE_MOVX(movl);
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break;
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}
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case kX64Movq:
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EmitOOLTrapIfNeeded(zone(), this, opcode, instr, i, __ pc_offset());
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if (instr->HasOutput()) {
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@ -140,9 +140,6 @@ namespace compiler {
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V(X64DecompressSigned) \
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V(X64DecompressPointer) \
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V(X64DecompressAny) \
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V(X64CompressSigned) \
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V(X64CompressPointer) \
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V(X64CompressAny) \
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V(X64Movq) \
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V(X64Movsd) \
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V(X64Movss) \
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@ -305,9 +305,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
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case kX64DecompressSigned:
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case kX64DecompressPointer:
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case kX64DecompressAny:
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case kX64CompressSigned:
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case kX64CompressPointer:
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case kX64CompressAny:
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return (instr->addressing_mode() == kMode_None)
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? kNoOpcodeFlags
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: kIsLoadOperation | kHasSideEffect;
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@ -1269,23 +1269,23 @@ void InstructionSelector::VisitChangeUint32ToUint64(Node* node) {
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}
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void InstructionSelector::VisitChangeTaggedToCompressed(Node* node) {
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X64OperandGenerator g(this);
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Node* value = node->InputAt(0);
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Emit(kX64CompressAny, g.DefineAsRegister(node), g.Use(value));
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// The top 32 bits in the 64-bit register will be undefined, and
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// must not be used by a dependent node.
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return EmitIdentity(node);
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}
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void InstructionSelector::VisitChangeTaggedPointerToCompressedPointer(
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Node* node) {
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X64OperandGenerator g(this);
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Node* value = node->InputAt(0);
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Emit(kX64CompressPointer, g.DefineAsRegister(node), g.Use(value));
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// The top 32 bits in the 64-bit register will be undefined, and
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// must not be used by a dependent node.
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return EmitIdentity(node);
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}
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void InstructionSelector::VisitChangeTaggedSignedToCompressedSigned(
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Node* node) {
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X64OperandGenerator g(this);
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Node* value = node->InputAt(0);
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Emit(kX64CompressSigned, g.DefineAsRegister(node), g.Use(value));
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// The top 32 bits in the 64-bit register will be undefined, and
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// must not be used by a dependent node.
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return EmitIdentity(node);
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}
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void InstructionSelector::VisitChangeCompressedToTagged(Node* node) {
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