[x64][ptr-compr][turbofan] Make compressions no-ops

Since we can just use the lower bits, we can make the compressions no-ops.
As a note, they still change the representation so that the machine graph
verifier is happy.

X64's version of: https://chromium-review.googlesource.com/c/v8/v8/+/1751722

Bug: v8:7703
Change-Id: I728eb8b6b3953f053a7042797f3c498d13e3c948
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1751729
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Commit-Queue: Santiago Aboy Solanes <solanes@chromium.org>
Cr-Commit-Position: refs/heads/master@{#63202}
This commit is contained in:
Santiago Aboy Solanes 2019-08-13 15:41:03 +01:00 committed by Commit Bot
parent 9cf4147464
commit 1821aff2d0
4 changed files with 9 additions and 21 deletions

View File

@ -2019,12 +2019,6 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
EmitWordLoadPoisoningIfNeeded(this, opcode, instr, i);
break;
}
case kX64CompressSigned: // Fall through.
case kX64CompressPointer: // Fall through.
case kX64CompressAny: {
ASSEMBLE_MOVX(movl);
break;
}
case kX64Movq:
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, i, __ pc_offset());
if (instr->HasOutput()) {

View File

@ -140,9 +140,6 @@ namespace compiler {
V(X64DecompressSigned) \
V(X64DecompressPointer) \
V(X64DecompressAny) \
V(X64CompressSigned) \
V(X64CompressPointer) \
V(X64CompressAny) \
V(X64Movq) \
V(X64Movsd) \
V(X64Movss) \

View File

@ -305,9 +305,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kX64DecompressSigned:
case kX64DecompressPointer:
case kX64DecompressAny:
case kX64CompressSigned:
case kX64CompressPointer:
case kX64CompressAny:
return (instr->addressing_mode() == kMode_None)
? kNoOpcodeFlags
: kIsLoadOperation | kHasSideEffect;

View File

@ -1269,23 +1269,23 @@ void InstructionSelector::VisitChangeUint32ToUint64(Node* node) {
}
void InstructionSelector::VisitChangeTaggedToCompressed(Node* node) {
X64OperandGenerator g(this);
Node* value = node->InputAt(0);
Emit(kX64CompressAny, g.DefineAsRegister(node), g.Use(value));
// The top 32 bits in the 64-bit register will be undefined, and
// must not be used by a dependent node.
return EmitIdentity(node);
}
void InstructionSelector::VisitChangeTaggedPointerToCompressedPointer(
Node* node) {
X64OperandGenerator g(this);
Node* value = node->InputAt(0);
Emit(kX64CompressPointer, g.DefineAsRegister(node), g.Use(value));
// The top 32 bits in the 64-bit register will be undefined, and
// must not be used by a dependent node.
return EmitIdentity(node);
}
void InstructionSelector::VisitChangeTaggedSignedToCompressedSigned(
Node* node) {
X64OperandGenerator g(this);
Node* value = node->InputAt(0);
Emit(kX64CompressSigned, g.DefineAsRegister(node), g.Use(value));
// The top 32 bits in the 64-bit register will be undefined, and
// must not be used by a dependent node.
return EmitIdentity(node);
}
void InstructionSelector::VisitChangeCompressedToTagged(Node* node) {