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Make v8 build with -Wimplicit-fallthrough in x86, arm, arm64, mips, mips64 configs.

Browse Source 
x86, arm, arm64: no change in behavior
mips, mips64: disasm-mips(64).cc grows an UNREACHABLE that's
              maybe optimistic (but if it's not true, then that
              looks like a current unintentional fallthrough at
              that spot)
test-js-typed-lowering.cc: looks like a clear bug, but test-only code

Follow-up to https://chromium-review.googlesource.com/c/v8/v8/+/911731 which
did this for x64.

Doesn't turn on the warning yet.

Bug: chromium:812686
Change-Id: I7dd79c9885c90f41dd7e3a595256a954ab0ae643
Reviewed-on: https://chromium-review.googlesource.com/923528
Reviewed-by: Jakob Kummerow <jkummerow@chromium.org>
Reviewed-by: Ben Titzer <titzer@chromium.org>
Commit-Queue: Nico Weber <thakis@chromium.org>
Cr-Commit-Position: refs/heads/master@{#51437}
This commit is contained in:
Nico Weber 2018-02-20 11:28:51 -05:00 committed by Commit Bot
parent 3da7cd3645
commit 19e0e69a97
17 changed files with 55 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/arm64/decoder-arm64-inl.h
View File

@ -462,6 +462,7 @@ void Decoder<V>::DecodeDataProcessing(Instruction* instr) {
}
break;
}
V8_FALLTHROUGH;
}
case 1:
case 3:

7
src/arm64/disasm-arm64.cc
View File

@ -968,7 +968,7 @@ void DisassemblingDecoder::VisitFPCompare(Instruction* instr) {
switch (instr->Mask(FPCompareMask)) {
case FCMP_s_zero:
case FCMP_d_zero: form = form_zero; // Fall through.
case FCMP_d_zero: form = form_zero; V8_FALLTHROUGH;
case FCMP_s:
case FCMP_d: mnemonic = "fcmp"; break;
default: form = "(FPCompare)";
@ -3718,6 +3718,8 @@ int DisassemblingDecoder::SubstituteImmediateField(Instruction* instr,
}
return 0;
}
UNIMPLEMENTED();
return 0;
}
case 'L': { // IVLSLane[0123] - suffix indicates access size shift.
AppendToOutput("%d", instr->NEONLSIndex(format[8] - '0'));
@ -3841,7 +3843,8 @@ int DisassemblingDecoder::SubstituteShiftField(Instruction* instr,
switch (format[1]) {
case 'D': { // NDP.
DCHECK(instr->ShiftDP() != ROR);
} // Fall through.
V8_FALLTHROUGH;
}
case 'L': { // NLo.
if (instr->ImmDPShift() != 0) {
const char* shift_type[] = {"lsl", "lsr", "asr", "ror"};

33
src/arm64/simulator-arm64.cc
View File

@ -1449,7 +1449,7 @@ void Simulator::VisitUnconditionalBranch(Instruction* instr) {
switch (instr->Mask(UnconditionalBranchMask)) {
case BL:
set_lr(instr->following());
// Fall through.
V8_FALLTHROUGH;
case B:
set_pc(instr->ImmPCOffsetTarget());
break;
@ -1477,7 +1477,7 @@ void Simulator::VisitUnconditionalBranchToRegister(Instruction* instr) {
// this, but if we do trap to allow debugging.
Debug();
}
// Fall through.
V8_FALLTHROUGH;
}
case BR:
case RET: set_pc(target); break;
@ -1629,7 +1629,7 @@ void Simulator::LogicalHelper(Instruction* instr, T op2) {
// Switch on the logical operation, stripping out the NOT bit, as it has a
// different meaning for logical immediate instructions.
switch (instr->Mask(LogicalOpMask & ~NOT)) {
case ANDS: update_flags = true; // Fall through.
case ANDS: update_flags = true; V8_FALLTHROUGH;
case AND: result = op1 & op2; break;
case ORR: result = op1 | op2; break;
case EOR: result = op1 ^ op2; break;
@ -4397,15 +4397,18 @@ void Simulator::NEONLoadStoreMultiStructHelper(const Instruction* instr,
case NEON_LD1_4v:
case NEON_LD1_4v_post:
ld1(vf, vreg(reg[3]), addr[3]);
count++; // Fall through.
count++;
V8_FALLTHROUGH;
case NEON_LD1_3v:
case NEON_LD1_3v_post:
ld1(vf, vreg(reg[2]), addr[2]);
count++; // Fall through.
count++;
V8_FALLTHROUGH;
case NEON_LD1_2v:
case NEON_LD1_2v_post:
ld1(vf, vreg(reg[1]), addr[1]);
count++; // Fall through.
count++;
V8_FALLTHROUGH;
case NEON_LD1_1v:
case NEON_LD1_1v_post:
ld1(vf, vreg(reg[0]), addr[0]);
@ -4413,15 +4416,18 @@ void Simulator::NEONLoadStoreMultiStructHelper(const Instruction* instr,
case NEON_ST1_4v:
case NEON_ST1_4v_post:
st1(vf, vreg(reg[3]), addr[3]);
count++; // Fall through.
count++;
V8_FALLTHROUGH;
case NEON_ST1_3v:
case NEON_ST1_3v_post:
st1(vf, vreg(reg[2]), addr[2]);
count++; // Fall through.
count++;
V8_FALLTHROUGH;
case NEON_ST1_2v:
case NEON_ST1_2v_post:
st1(vf, vreg(reg[1]), addr[1]);
count++; // Fall through.
count++;
V8_FALLTHROUGH;
case NEON_ST1_1v:
case NEON_ST1_1v_post:
st1(vf, vreg(reg[0]), addr[0]);
@ -4534,7 +4540,8 @@ void Simulator::NEONLoadStoreSingleStructHelper(const Instruction* instr,
case NEON_LD3_b_post:
case NEON_LD4_b:
case NEON_LD4_b_post:
do_load = true; // Fall through.
do_load = true;
V8_FALLTHROUGH;
case NEON_ST1_b:
case NEON_ST1_b_post:
case NEON_ST2_b:
@ -4553,7 +4560,8 @@ void Simulator::NEONLoadStoreSingleStructHelper(const Instruction* instr,
case NEON_LD3_h_post:
case NEON_LD4_h:
case NEON_LD4_h_post:
do_load = true; // Fall through.
do_load = true;
V8_FALLTHROUGH;
case NEON_ST1_h:
case NEON_ST1_h_post:
case NEON_ST2_h:
@ -4573,7 +4581,8 @@ void Simulator::NEONLoadStoreSingleStructHelper(const Instruction* instr,
case NEON_LD3_s_post:
case NEON_LD4_s:
case NEON_LD4_s_post:
do_load = true; // Fall through.
do_load = true;
V8_FALLTHROUGH;
case NEON_ST1_s:
case NEON_ST1_s_post:
case NEON_ST2_s:

4
src/compiler/arm/instruction-selector-arm.cc
View File

@ -1166,6 +1166,7 @@ void InstructionSelector::VisitInt32Add(Node* node) {
g.UseRegister(mleft.left().node()), g.TempImmediate(0));
return;
}
break;
}
case IrOpcode::kWord32Sar: {
Int32BinopMatcher mleft(m.left().node());
@ -1184,6 +1185,7 @@ void InstructionSelector::VisitInt32Add(Node* node) {
return;
}
}
break;
}
default:
break;
@ -1220,6 +1222,7 @@ void InstructionSelector::VisitInt32Add(Node* node) {
g.UseRegister(mright.left().node()), g.TempImmediate(0));
return;
}
break;
}
case IrOpcode::kWord32Sar: {
Int32BinopMatcher mright(m.right().node());
@ -1238,6 +1241,7 @@ void InstructionSelector::VisitInt32Add(Node* node) {
return;
}
}
break;
}
default:
break;

4
src/compiler/arm64/instruction-selector-arm64.cc
View File

@ -1654,6 +1654,7 @@ void InstructionSelector::VisitChangeUint32ToUint64(Node* node) {
default:
break;
}
break;
}
default:
break;
@ -2003,7 +2004,8 @@ bool TryEmitCbzOrTbz(InstructionSelector* selector, Node* node, uint32_t value,
return true;
}
}
} // Fall through.
V8_FALLTHROUGH;
}
case kUnsignedLessThanOrEqual:
case kUnsignedGreaterThan: {
if (value != 0) return false;

2
src/compiler/ia32/instruction-selector-ia32.cc
View File

@ -77,6 +77,8 @@ class IA32OperandGenerator final : public OperandGenerator {
Handle<HeapObject> value = OpParameter<Handle<HeapObject>>(node);
Isolate* isolate = value->GetIsolate();
return !isolate->heap()->InNewSpace(*value);
#else
return false;
#endif
}
default:

2
src/compiler/load-elimination.cc
View File

@ -1346,7 +1346,7 @@ int LoadElimination::FieldIndexOf(FieldAccess const& access) {
if (kDoubleSize != kPointerSize) {
return -1; // We currently only track pointer size fields.
}
V8_FALLTHROUGH;
break;
case MachineRepresentation::kTaggedSigned:
case MachineRepresentation::kTaggedPointer:
case MachineRepresentation::kTagged:

1
src/compiler/mips64/instruction-selector-mips64.cc
View File

@ -1388,6 +1388,7 @@ void InstructionSelector::VisitChangeUint32ToUint64(Node* node) {
break;
}
}
break;
}
default:
break;

5
src/ia32/assembler-ia32.cc
View File

@ -411,6 +411,7 @@ void Assembler::Nop(int bytes) {
switch (bytes) {
case 2:
EMIT(0x66);
V8_FALLTHROUGH;
case 1:
EMIT(0x90);
return;
@ -427,6 +428,7 @@ void Assembler::Nop(int bytes) {
return;
case 6:
EMIT(0x66);
V8_FALLTHROUGH;
case 5:
EMIT(0xF);
EMIT(0x1F);
@ -447,12 +449,15 @@ void Assembler::Nop(int bytes) {
case 11:
EMIT(0x66);
bytes--;
V8_FALLTHROUGH;
case 10:
EMIT(0x66);
bytes--;
V8_FALLTHROUGH;
case 9:
EMIT(0x66);
bytes--;
V8_FALLTHROUGH;
case 8:
EMIT(0xF);
EMIT(0x1F);

1
src/mips/disasm-mips.cc
View File

@ -917,6 +917,7 @@ int Decoder::FormatOption(Instruction* instr, const char* format) {
PrintMsaImmElm(instr);
return 4;
}
UNREACHABLE();
}
case 'r': { // 'r: registers.
return FormatRegister(instr, format);

3
src/mips/simulator-mips.cc
View File

@ -5683,7 +5683,8 @@ void Simulator::DecodeTypeMsa3RF() {
case MSUB_Q:
case MADDR_Q:
case MSUBR_Q:
get_msa_register(wd_reg(), &wd); // fall-through
get_msa_register(wd_reg(), &wd);
V8_FALLTHROUGH;
case MUL_Q:
case MULR_Q:
switch (DecodeMsaDataFormat()) {

1
src/mips64/disasm-mips64.cc
View File

@ -958,6 +958,7 @@ int Decoder::FormatOption(Instruction* instr, const char* format) {
PrintMsaImmElm(instr);
return 4;
}
UNREACHABLE();
}
case 'r': { // 'r: registers.
return FormatRegister(instr, format);

3
src/mips64/simulator-mips64.cc
View File

@ -5907,7 +5907,8 @@ void Simulator::DecodeTypeMsa3RF() {
case MSUB_Q:
case MADDR_Q:
case MSUBR_Q:
get_msa_register(wd_reg(), &wd); // fall-through
get_msa_register(wd_reg(), &wd);
V8_FALLTHROUGH;
case MUL_Q:
case MULR_Q:
switch (DecodeMsaDataFormat()) {

6
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
View File

@ -227,7 +227,7 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
switch (type.value()) {
case StoreType::kI64Store8:
src = src.low();
// fall through
V8_FALLTHROUGH;
case StoreType::kI32Store8:
// Only the lower 4 registers can be addressed as 8-bit registers.
if (src.gp().is_byte_register()) {
@ -240,13 +240,13 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
break;
case StoreType::kI64Store16:
src = src.low();
// fall through
V8_FALLTHROUGH;
case StoreType::kI32Store16:
mov_w(dst_op, src.gp());
break;
case StoreType::kI64Store32:
src = src.low();
// fall through
V8_FALLTHROUGH;
case StoreType::kI32Store:
mov(dst_op, src.gp());
break;

2
test/cctest/compiler/test-code-generator.cc
View File

@ -206,7 +206,7 @@ Handle<Code> BuildTeardownFunction(Isolate* isolate,
case MachineRepresentation::kFloat32:
param =
tester.raw_assembler_for_testing()->ChangeFloat32ToFloat64(param);
// Fallthrough
V8_FALLTHROUGH;
case MachineRepresentation::kFloat64:
__ StoreObjectFieldNoWriteBarrier(
__ LoadFixedArrayElement(result_array, i), HeapNumber::kValueOffset,

1
test/cctest/compiler/test-js-typed-lowering.cc
View File

@ -702,6 +702,7 @@ TEST(RemoveToNumberEffects) {
break;
case 2:
effect_use = R.graph.NewNode(R.common.EffectPhi(1), ton, R.start());
break;
case 3:
effect_use = R.graph.NewNode(R.javascript.Add(R.binop_hints), ton, ton,
R.context(), frame_state, ton, R.start());

1
test/cctest/test-api.cc
View File

@ -13932,6 +13932,7 @@ void SetFunctionEntryHookTest::OnJitEvent(const v8::JitCodeEvent* event) {
info);
}
}
break;
default:
break;
}