cppgc: Conservative stack scanning for arm32
Bug: chromium:1056170 Change-Id: I417a0f05bcd185e969fb087a6b132e88c3fa3a5d Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2129635 Reviewed-by: Anton Bikineev <bikineev@chromium.org> Commit-Queue: Michael Lippautz <mlippautz@chromium.org> Cr-Commit-Position: refs/heads/master@{#67011}
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BUILD.gn
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BUILD.gn
@ -349,7 +349,7 @@ config("libbase_config") {
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# This config should be applied to code using the cppgc_base.
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config("cppgc_base_config") {
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if (is_clang) {
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if (target_cpu == "x64" || target_cpu == "x86") {
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if (target_cpu == "x64" || target_cpu == "x86" || target_cpu == "arm") {
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defines = [ "CPPGC_SUPPORTS_CONSERVATIVE_STACK_SCAN" ]
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}
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}
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@ -3972,6 +3972,8 @@ v8_source_set("cppgc_base") {
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sources += [ "src/heap/cppgc/asm/x64/push_registers_clang.cc" ]
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} else if (target_cpu == "x86") {
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sources += [ "src/heap/cppgc/asm/ia32/push_registers_clang.cc" ]
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} else if (target_cpu == "arm") {
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sources += [ "src/heap/cppgc/asm/arm/push_registers_clang.cc" ]
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}
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}
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src/heap/cppgc/asm/arm/push_registers_clang.cc
Normal file
38
src/heap/cppgc/asm/arm/push_registers_clang.cc
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@ -0,0 +1,38 @@
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// Copyright 2020 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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// Push all callee-saved registers to get them on the stack for conservative
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// stack scanning.
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//
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// See asm/x64/push_registers_clang.cc for why the function is not generated
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// using clang.
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//
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// Do not depend on V8_TARGET_OS_* defines as some embedders may override the
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// GN toolchain (e.g. ChromeOS) and not provide them.
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// We maintain 8-byte alignment at calls by pushing an additional
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// non-callee-saved register (r3).
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//
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// Calling convention source:
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// https://en.wikipedia.org/wiki/Calling_convention#ARM_(A32)
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// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka4127.html
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asm(".globl PushAllRegistersAndIterateStack \n"
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".hidden PushAllRegistersAndIterateStack \n"
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"PushAllRegistersAndIterateStack: \n"
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// Push all callee-saved registers and save return address.
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// Only {r4-r11} are callee-saved registers. Push r3 in addition to align
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// the stack back to 8 bytes.
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" push {r3-r11, lr} \n"
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// Pass 1st parameter (r0) unchanged (Stack*).
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// Pass 2nd parameter (r1) unchanged (StackVisitor*).
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// Save 3rd parameter (r2; IterateStackCallback).
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" mov r3, r2 \n"
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// Pass 3rd parameter as sp (stack pointer).
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" mov r2, sp \n"
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// Call the callback.
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" blx r3 \n"
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// Discard all the registers.
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" add sp, sp, #36 \n"
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// Pop lr into pc which returns and switches mode if needed.
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" pop {pc} \n");
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