PPC/s390: [ptr-compr] Switch to 31 bit Smis on 64-bit architectures

Port 12a9ee3a5b

Original Commit Message:

    32 bit Smis are incompatible with pointer compression so we land disable
    them before enabling pointer compression in order to separate memory and
    performance regressions caused by 31 bit Smis from pointer compression
    change.

R=ishell@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=
LOG=N

Change-Id: I5d180c6435796284224a45053ff44e7a25fa6e2a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1822118
Reviewed-by: Igor Sheludko <ishell@chromium.org>
Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#63970}
This commit is contained in:
Milad Farazmand 2019-09-24 12:46:36 -04:00 committed by Commit Bot
parent c7848612d8
commit 1a92c9851c
2 changed files with 19 additions and 19 deletions

View File

@ -2409,51 +2409,51 @@ void MacroAssembler::Xor(Register ra, Register rs, const Operand& rb,
void MacroAssembler::CmpSmiLiteral(Register src1, Smi smi, Register scratch,
CRegister cr) {
#if V8_TARGET_ARCH_PPC64
#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
Cmpi(src1, Operand(smi), scratch, cr);
#else
LoadSmiLiteral(scratch, smi);
cmp(src1, scratch, cr);
#else
Cmpi(src1, Operand(smi), scratch, cr);
#endif
}
void MacroAssembler::CmplSmiLiteral(Register src1, Smi smi, Register scratch,
CRegister cr) {
#if V8_TARGET_ARCH_PPC64
#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
Cmpli(src1, Operand(smi), scratch, cr);
#else
LoadSmiLiteral(scratch, smi);
cmpl(src1, scratch, cr);
#else
Cmpli(src1, Operand(smi), scratch, cr);
#endif
}
void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi smi,
Register scratch) {
#if V8_TARGET_ARCH_PPC64
#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
Add(dst, src, static_cast<intptr_t>(smi.ptr()), scratch);
#else
LoadSmiLiteral(scratch, smi);
add(dst, src, scratch);
#else
Add(dst, src, reinterpret_cast<intptr_t>(smi), scratch);
#endif
}
void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi smi,
Register scratch) {
#if V8_TARGET_ARCH_PPC64
#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
Add(dst, src, -(static_cast<intptr_t>(smi.ptr())), scratch);
#else
LoadSmiLiteral(scratch, smi);
sub(dst, src, scratch);
#else
Add(dst, src, -(reinterpret_cast<intptr_t>(smi)), scratch);
#endif
}
void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi smi,
Register scratch, RCBit rc) {
#if V8_TARGET_ARCH_PPC64
#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
And(dst, src, Operand(smi), rc);
#else
LoadSmiLiteral(scratch, smi);
and_(dst, src, scratch, rc);
#else
And(dst, src, Operand(smi), rc);
#endif
}

View File

@ -3456,16 +3456,16 @@ void TurboAssembler::LoadFloat32Literal(DoubleRegister result, float value,
}
void TurboAssembler::CmpSmiLiteral(Register src1, Smi smi, Register scratch) {
#if V8_TARGET_ARCH_S390X
#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
// CFI takes 32-bit immediate.
cfi(src1, Operand(smi));
#else
if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
cih(src1, Operand(static_cast<intptr_t>(smi.ptr()) >> 32));
} else {
LoadSmiLiteral(scratch, smi);
cgr(src1, scratch);
}
#else
// CFI takes 32-bit immediate.
cfi(src1, Operand(smi));
#endif
}