PPC/s390: [ptr-compr] Switch to 31 bit Smis on 64-bit architectures
Port 12a9ee3a5b
Original Commit Message:
32 bit Smis are incompatible with pointer compression so we land disable
them before enabling pointer compression in order to separate memory and
performance regressions caused by 31 bit Smis from pointer compression
change.
R=ishell@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=
LOG=N
Change-Id: I5d180c6435796284224a45053ff44e7a25fa6e2a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1822118
Reviewed-by: Igor Sheludko <ishell@chromium.org>
Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#63970}
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c7848612d8
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@ -2409,51 +2409,51 @@ void MacroAssembler::Xor(Register ra, Register rs, const Operand& rb,
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void MacroAssembler::CmpSmiLiteral(Register src1, Smi smi, Register scratch,
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CRegister cr) {
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#if V8_TARGET_ARCH_PPC64
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#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
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Cmpi(src1, Operand(smi), scratch, cr);
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#else
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LoadSmiLiteral(scratch, smi);
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cmp(src1, scratch, cr);
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#else
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Cmpi(src1, Operand(smi), scratch, cr);
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#endif
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}
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void MacroAssembler::CmplSmiLiteral(Register src1, Smi smi, Register scratch,
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CRegister cr) {
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#if V8_TARGET_ARCH_PPC64
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#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
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Cmpli(src1, Operand(smi), scratch, cr);
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#else
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LoadSmiLiteral(scratch, smi);
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cmpl(src1, scratch, cr);
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#else
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Cmpli(src1, Operand(smi), scratch, cr);
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#endif
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}
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void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi smi,
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Register scratch) {
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#if V8_TARGET_ARCH_PPC64
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#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
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Add(dst, src, static_cast<intptr_t>(smi.ptr()), scratch);
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#else
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LoadSmiLiteral(scratch, smi);
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add(dst, src, scratch);
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#else
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Add(dst, src, reinterpret_cast<intptr_t>(smi), scratch);
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#endif
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}
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void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi smi,
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Register scratch) {
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#if V8_TARGET_ARCH_PPC64
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#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
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Add(dst, src, -(static_cast<intptr_t>(smi.ptr())), scratch);
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#else
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LoadSmiLiteral(scratch, smi);
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sub(dst, src, scratch);
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#else
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Add(dst, src, -(reinterpret_cast<intptr_t>(smi)), scratch);
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#endif
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}
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void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi smi,
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Register scratch, RCBit rc) {
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#if V8_TARGET_ARCH_PPC64
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#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
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And(dst, src, Operand(smi), rc);
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#else
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LoadSmiLiteral(scratch, smi);
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and_(dst, src, scratch, rc);
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#else
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And(dst, src, Operand(smi), rc);
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#endif
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}
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@ -3456,16 +3456,16 @@ void TurboAssembler::LoadFloat32Literal(DoubleRegister result, float value,
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}
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void TurboAssembler::CmpSmiLiteral(Register src1, Smi smi, Register scratch) {
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#if V8_TARGET_ARCH_S390X
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#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
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// CFI takes 32-bit immediate.
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cfi(src1, Operand(smi));
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#else
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if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
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cih(src1, Operand(static_cast<intptr_t>(smi.ptr()) >> 32));
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} else {
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LoadSmiLiteral(scratch, smi);
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cgr(src1, scratch);
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}
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#else
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// CFI takes 32-bit immediate.
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cfi(src1, Operand(smi));
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#endif
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}
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