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[wasm-simd][liftoff][x64] Implement v64x2.alltrue and i64x2.ne

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Other archs will come later.

Bug: v8:11347,v8:11348
Change-Id: I9ea656b9c7ce03c9dafb631dd67f6e2f7d4346a2
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2686312
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#72674}
This commit is contained in:
Ng Zhi An 2021-02-09 13:29:39 -08:00 committed by Commit Bot
parent 4f76cb297c
commit 1b81ffb1d7
6 changed files with 53 additions and 1 deletions
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10
src/wasm/baseline/arm/liftoff-assembler-arm.h
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@ -2824,6 +2824,11 @@ void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst,
liftoff::GetSimd128Register(src));
}
void LiftoffAssembler::emit_v64x2_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v64x2_alltrue");
}
void LiftoffAssembler::emit_i64x2_shl(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
liftoff::EmitSimdShift<liftoff::kLeft, NeonS64, Neon32>(this, dst, lhs, rhs);
@ -3730,6 +3735,11 @@ void LiftoffAssembler::emit_i64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
liftoff::GetSimd128Register(rhs));
}
void LiftoffAssembler::emit_i64x2_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "i64x2_ne");
}
void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
vceq(liftoff::GetSimd128Register(dst), liftoff::GetSimd128Register(lhs),

10
src/wasm/baseline/arm64/liftoff-assembler-arm64.h
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@ -1993,6 +1993,11 @@ void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst,
Neg(dst.fp().V2D(), src.fp().V2D());
}
void LiftoffAssembler::emit_v64x2_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v64x2_alltrue");
}
void LiftoffAssembler::emit_i64x2_shl(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
liftoff::EmitSimdShift<liftoff::ShiftDirection::kLeft>(
@ -2734,6 +2739,11 @@ void LiftoffAssembler::emit_i64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
Cmeq(dst.fp().V2D(), lhs.fp().V2D(), rhs.fp().V2D());
}
void LiftoffAssembler::emit_i64x2_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "i64x2_ne");
}
void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
Fcmeq(dst.fp().V4S(), lhs.fp().V4S(), rhs.fp().V4S());

10
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
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@ -3111,6 +3111,11 @@ void LiftoffAssembler::emit_i64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
this, dst, lhs, rhs, SSE4_1);
}
void LiftoffAssembler::emit_i64x2_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "i64x2_ne");
}
void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
liftoff::EmitSimdCommutativeBinOp<&Assembler::vcmpeqps, &Assembler::cmpeqps>(
@ -3819,6 +3824,11 @@ void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst,
}
}
void LiftoffAssembler::emit_v64x2_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v64x2_alltrue");
}
void LiftoffAssembler::emit_i64x2_shl(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
liftoff::EmitSimdShiftOp<&Assembler::vpsllq, &Assembler::psllq, 6>(this, dst,

3
src/wasm/baseline/liftoff-assembler.h
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@ -932,6 +932,8 @@ class LiftoffAssembler : public TurboAssembler {
LiftoffRegister rhs);
inline void emit_i64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_i64x2_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_f32x4_ne(LiftoffRegister dst, LiftoffRegister lhs,
@ -1092,6 +1094,7 @@ class LiftoffAssembler : public TurboAssembler {
LiftoffRegister src1,
LiftoffRegister src2);
inline void emit_i64x2_neg(LiftoffRegister dst, LiftoffRegister src);
inline void emit_v64x2_alltrue(LiftoffRegister dst, LiftoffRegister src);
inline void emit_i64x2_shl(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_i64x2_shli(LiftoffRegister dst, LiftoffRegister lhs,

2
src/wasm/baseline/liftoff-compiler.cc
View File

@ -3205,6 +3205,8 @@ class LiftoffCompiler {
&LiftoffAssembler::emit_i32x4_extmul_high_i16x8_u);
case wasm::kExprI64x2Neg:
return EmitUnOp<kS128, kS128>(&LiftoffAssembler::emit_i64x2_neg);
case wasm::kExprV64x2AllTrue:
return EmitUnOp<kS128, kI32>(&LiftoffAssembler::emit_v64x2_alltrue);
case wasm::kExprI64x2Shl:
return EmitSimdShiftOp(&LiftoffAssembler::emit_i64x2_shl,
&LiftoffAssembler::emit_i64x2_shli);

19
src/wasm/baseline/x64/liftoff-assembler-x64.h
View File

@ -2319,7 +2319,11 @@ inline void EmitAnyTrue(LiftoffAssembler* assm, LiftoffRegister dst,
template <void (TurboAssembler::*pcmp)(XMMRegister, XMMRegister)>
inline void EmitAllTrue(LiftoffAssembler* assm, LiftoffRegister dst,
LiftoffRegister src) {
LiftoffRegister src,
base::Optional<CpuFeature> feature = base::nullopt) {
base::Optional<CpuFeatureScope> sse_scope;
if (feature.has_value()) sse_scope.emplace(assm, *feature);
XMMRegister tmp = kScratchDoubleReg;
assm->xorq(dst.gp(), dst.gp());
assm->Pxor(tmp, tmp);
@ -2696,6 +2700,14 @@ void LiftoffAssembler::emit_i64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
this, dst, lhs, rhs, SSE4_1);
}
void LiftoffAssembler::emit_i64x2_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
liftoff::EmitSimdCommutativeBinOp<&Assembler::vpcmpeqq, &Assembler::pcmpeqq>(
this, dst, lhs, rhs, SSE4_1);
Pcmpeqq(kScratchDoubleReg, kScratchDoubleReg);
Pxor(dst.fp(), kScratchDoubleReg);
}
void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
liftoff::EmitSimdCommutativeBinOp<&Assembler::vcmpeqps, &Assembler::cmpeqps>(
@ -3391,6 +3403,11 @@ void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst,
}
}
void LiftoffAssembler::emit_v64x2_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
liftoff::EmitAllTrue<&TurboAssembler::Pcmpeqq>(this, dst, src, SSE4_1);
}
void LiftoffAssembler::emit_i64x2_shl(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
liftoff::EmitSimdShiftOp<&Assembler::vpsllq, &Assembler::psllq, 6>(this, dst,