[ARM64] Change TruncateInt64ToInt32 to a NOP.
BUG= Review-Url: https://codereview.chromium.org/2240803003 Cr-Commit-Position: refs/heads/master@{#38612}
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@ -1671,18 +1671,9 @@ void InstructionSelector::VisitRoundFloat64ToInt32(Node* node) {
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void InstructionSelector::VisitTruncateInt64ToInt32(Node* node) {
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Arm64OperandGenerator g(this);
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Node* value = node->InputAt(0);
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if (CanCover(node, value) && value->InputCount() >= 2) {
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Int64BinopMatcher m(value);
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if ((m.IsWord64Sar() && m.right().HasValue() &&
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(m.right().Value() == 32)) ||
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(m.IsWord64Shr() && m.right().IsInRange(32, 63))) {
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Emit(kArm64Lsr, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
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g.UseImmediate(m.right().node()));
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return;
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}
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}
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Emit(kArm64Mov32, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
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// The top 32 bits in the 64-bit register will be undefined, and
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// must not be used by a dependent node.
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Emit(kArchNop, g.DefineSameAsFirst(node), g.UseRegister(value));
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}
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@ -314,7 +314,7 @@ const Conversion kConversionInstructions[] = {
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kArm64Mov32, MachineType::Uint64()},
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MachineType::Uint32()},
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{{&RawMachineAssembler::TruncateInt64ToInt32, "TruncateInt64ToInt32",
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kArm64Mov32, MachineType::Int32()},
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kArchNop, MachineType::Int32()},
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MachineType::Int64()},
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{{&RawMachineAssembler::ChangeInt32ToFloat64, "ChangeInt32ToFloat64",
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kArm64Int32ToFloat64, MachineType::Float64()},
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@ -1799,12 +1799,11 @@ TEST_F(InstructionSelectorTest, TruncateInt64ToInt32WithWord64Sar) {
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m.Return(t);
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kArm64Lsr, s[0]->arch_opcode());
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EXPECT_EQ(kArm64Asr, s[0]->arch_opcode());
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ASSERT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(s.ToVreg(p), s.ToVreg(s[0]->InputAt(0)));
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EXPECT_EQ(32, s.ToInt64(s[0]->InputAt(1)));
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ASSERT_EQ(1U, s[0]->OutputCount());
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EXPECT_EQ(s.ToVreg(t), s.ToVreg(s[0]->OutputAt(0)));
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}
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@ -1821,7 +1820,6 @@ TEST_F(InstructionSelectorTest, TruncateInt64ToInt32WithWord64Shr) {
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EXPECT_EQ(s.ToVreg(p), s.ToVreg(s[0]->InputAt(0)));
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EXPECT_EQ(x, s.ToInt64(s[0]->InputAt(1)));
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ASSERT_EQ(1U, s[0]->OutputCount());
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EXPECT_EQ(s.ToVreg(t), s.ToVreg(s[0]->OutputAt(0)));
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}
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}
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@ -2319,6 +2317,10 @@ TEST_P(InstructionSelectorConversionTest, Parameter) {
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StreamBuilder m(this, conv.mi.machine_type, conv.src_machine_type);
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m.Return((m.*conv.mi.constructor)(m.Parameter(0)));
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Stream s = m.Build();
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if (conv.mi.arch_opcode == kArchNop) {
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ASSERT_EQ(0U, s.size());
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return;
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}
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(conv.mi.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(1U, s[0]->InputCount());
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