From 25d4eeaf98cb89559c6ffd0ff6b31f0627683443 Mon Sep 17 00:00:00 2001 From: "yangguo@chromium.org" Date: Wed, 18 Jul 2012 13:50:19 +0000 Subject: [PATCH] MIPS: Fix transcendental cache on ARM in optimized code. Port r12086 (84066033) BUG= TEST= Review URL: https://chromiumcodereview.appspot.com/10782023 Patch from Akos Palfi . git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12132 ce2b1a6d-e550-0410-aec6-3dcde31c8c00 --- src/mips/code-stubs-mips.cc | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mips/code-stubs-mips.cc b/src/mips/code-stubs-mips.cc index 7ae84fa9ff..0eea32cbc5 100644 --- a/src/mips/code-stubs-mips.cc +++ b/src/mips/code-stubs-mips.cc @@ -3533,23 +3533,23 @@ void TranscendentalCacheStub::Generate(MacroAssembler* masm) { 1, 1); } else { - if (!CpuFeatures::IsSupported(FPU)) UNREACHABLE(); + ASSERT(CpuFeatures::IsSupported(FPU)); CpuFeatures::Scope scope(FPU); Label no_update; Label skip_cache; // Call C function to calculate the result and update the cache. - // Register a0 holds precalculated cache entry address; preserve - // it on the stack and pop it into register cache_entry after the - // call. - __ Push(cache_entry, a2, a3); + // a0: precalculated cache entry address. + // a2 and a3: parts of the double value. + // Store a0, a2 and a3 on stack for later before calling C function. + __ Push(a3, a2, cache_entry); GenerateCallCFunction(masm, scratch0); __ GetCFunctionDoubleResult(f4); // Try to update the cache. If we cannot allocate a // heap number, we return the result without updating. - __ Pop(cache_entry, a2, a3); + __ Pop(a3, a2, cache_entry); __ LoadRoot(t1, Heap::kHeapNumberMapRootIndex); __ AllocateHeapNumber(t2, scratch0, scratch1, t1, &no_update); __ sdc1(f4, FieldMemOperand(t2, HeapNumber::kValueOffset));