PPC/s390: [wasm][arm][arm64][liftoff] Allow loads from negative indices
Port 4765c70fa6
Original Commit Message:
On arm, the root register points into the middle of the roots array to
allow to use the full int12_t offset range. Therefore some offsets into
the root array are negative. This CL changes the liftoff assembler for
arm to allow loads from negative offsets.
On arm64, offsets can also be negative when pointer compression is
disabled.
Additionally this CL changes the signature of
LiftoffAssembler::LoadTaggedPointer from uint32_t to int32_t to allow
the LiftoffCompiler to provide negative indices.
This CL does not come with a separate test yet. However, this changes is
needed for https://crrev.com/c/2352784. Where there will also be a test.
R=ahaas@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=
LOG=N
Change-Id: Ie286b0169a5f7a1de90e0ec7002bfac83383ea6c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2363127
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#69456}
This commit is contained in:
parent
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@ -114,7 +114,7 @@ void LiftoffAssembler::FillInstanceInto(Register dst) {
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void LiftoffAssembler::LoadTaggedPointer(Register dst, Register src_addr,
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Register offset_reg,
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uint32_t offset_imm,
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int32_t offset_imm,
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LiftoffRegList pinned) {
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bailout(kUnsupportedArchitecture, "LoadTaggedPointer");
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}
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@ -113,7 +113,7 @@ void LiftoffAssembler::FillInstanceInto(Register dst) {
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void LiftoffAssembler::LoadTaggedPointer(Register dst, Register src_addr,
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Register offset_reg,
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uint32_t offset_imm,
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int32_t offset_imm,
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LiftoffRegList pinned) {
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bailout(kUnsupportedArchitecture, "LoadTaggedPointer");
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}
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