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[mips][wasm-simd][liftoff] Implement ne

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Port 6f7b4c7fde
https://crrev.com/c/2154330

Change-Id: I1788a3f6ca30bb684efa182f5e4e40bb3052c052
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2156711
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#67272}
This commit is contained in:
Zhao Jiazhong 2020-04-21 02:34:57 -04:00 committed by Commit Bot
parent e1b93a4ff5
commit 268e717643
2 changed files with 65 additions and 0 deletions
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25
src/wasm/baseline/mips/liftoff-assembler-mips.h
View File

@ -1589,6 +1589,11 @@ void LiftoffAssembler::emit_i8x16_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i8x16_eq");
}
void LiftoffAssembler::emit_i8x16_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i8x16_ne");
}
void LiftoffAssembler::emit_i16x8_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
@ -1597,6 +1602,11 @@ void LiftoffAssembler::emit_i16x8_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i16x8_eq");
}
void LiftoffAssembler::emit_i16x8_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i16x8_ne");
}
void LiftoffAssembler::emit_i32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
@ -1605,6 +1615,11 @@ void LiftoffAssembler::emit_i32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i32x4_eq");
}
void LiftoffAssembler::emit_i32x4_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i32x4_ne");
}
void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
@ -1613,6 +1628,11 @@ void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f32x4_eq");
}
void LiftoffAssembler::emit_f32x4_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_ne");
}
void LiftoffAssembler::emit_f64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
@ -1621,6 +1641,11 @@ void LiftoffAssembler::emit_f64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f64x2_eq");
}
void LiftoffAssembler::emit_f64x2_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_ne");
}
void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming

40
src/wasm/baseline/mips64/liftoff-assembler-mips64.h
View File

@ -1404,6 +1404,14 @@ void LiftoffAssembler::emit_i8x16_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i8x16_eq");
}
void LiftoffAssembler::emit_i8x16_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i8x16_ne");
}
void LiftoffAssembler::emit_i16x8_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
@ -1412,6 +1420,14 @@ void LiftoffAssembler::emit_i16x8_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i16x8_eq");
}
void LiftoffAssembler::emit_i16x8_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i16x8_ne");
}
void LiftoffAssembler::emit_i32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
@ -1420,6 +1436,14 @@ void LiftoffAssembler::emit_i32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i32x4_eq");
}
void LiftoffAssembler::emit_i32x4_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i32x4_ne");
}
void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
@ -1428,6 +1452,14 @@ void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f32x4_eq");
}
void LiftoffAssembler::emit_f32x4_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f32x4_ne");
}
void LiftoffAssembler::emit_f64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
@ -1436,6 +1468,14 @@ void LiftoffAssembler::emit_f64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f64x2_eq");
}
void LiftoffAssembler::emit_f64x2_ne(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f64x2_ne");
}
void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming