Move host/target detection macros to API
Since v8config.h already defines the related logic for OS detection, it should be fine to move arch detection also there. The CL also makes Oilpan use one of those macros to avoid discrepancy between the compiler and custom macros (the discrepancy occurs for host tools, e.g. mksnapshot). Bug: chromium:1336222 Change-Id: Ibe7d9116d27c3e816f4778fd4c149d8142d0f7a9 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3726208 Commit-Queue: Anton Bikineev <bikineev@chromium.org> Reviewed-by: Michael Lippautz <mlippautz@chromium.org> Cr-Commit-Position: refs/heads/main@{#81397}
This commit is contained in:
Anton Bikineev
V8 LUCI CQ
parent
a8b2eff64e
commit
28b5d29984
@ -32,7 +32,7 @@ static constexpr uint16_t kFullyConstructedBitMask = uint16_t{1};
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static constexpr size_t kPageSize = size_t{1} << 17;
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#if defined(__aarch64__) && defined(V8_OS_MACOS)
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#if defined(V8_TARGET_ARCH_ARM64) && defined(V8_OS_MACOS)
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constexpr size_t kGuardPageSize = 0;
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#else
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constexpr size_t kGuardPageSize = 4096;
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@ -589,6 +589,205 @@ V8 shared library set USING_V8_SHARED.
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// clang-format on
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// Processor architecture detection. For more info on what's defined, see:
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// http://msdn.microsoft.com/en-us/library/b0084kay.aspx
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// http://www.agner.org/optimize/calling_conventions.pdf
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// or with gcc, run: "echo | gcc -E -dM -"
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// The V8_HOST_ARCH_* macros correspond to the architecture on which V8, as a
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// virtual machine and compiler, runs. Don't confuse this with the architecture
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// on which V8 is built.
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#if defined(_M_X64) || defined(__x86_64__)
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#define V8_HOST_ARCH_X64 1
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#if defined(__x86_64__) && __SIZEOF_POINTER__ == 4 // Check for x32.
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#define V8_HOST_ARCH_32_BIT 1
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#else
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#define V8_HOST_ARCH_64_BIT 1
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#endif
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#elif defined(_M_IX86) || defined(__i386__)
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#define V8_HOST_ARCH_IA32 1
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#define V8_HOST_ARCH_32_BIT 1
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#elif defined(__AARCH64EL__) || defined(_M_ARM64)
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#define V8_HOST_ARCH_ARM64 1
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#define V8_HOST_ARCH_64_BIT 1
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#elif defined(__ARMEL__)
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#define V8_HOST_ARCH_ARM 1
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#define V8_HOST_ARCH_32_BIT 1
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#elif defined(__mips64)
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#define V8_HOST_ARCH_MIPS64 1
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#define V8_HOST_ARCH_64_BIT 1
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#elif defined(__MIPSEB__) || defined(__MIPSEL__)
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#define V8_HOST_ARCH_MIPS 1
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#define V8_HOST_ARCH_32_BIT 1
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#elif defined(__loongarch64)
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#define V8_HOST_ARCH_LOONG64 1
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#define V8_HOST_ARCH_64_BIT 1
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#elif defined(__PPC64__) || defined(_ARCH_PPC64)
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#define V8_HOST_ARCH_PPC64 1
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#define V8_HOST_ARCH_64_BIT 1
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#elif defined(__PPC__) || defined(_ARCH_PPC)
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#define V8_HOST_ARCH_PPC 1
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#define V8_HOST_ARCH_32_BIT 1
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#elif defined(__s390__) || defined(__s390x__)
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#define V8_HOST_ARCH_S390 1
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#if defined(__s390x__)
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#define V8_HOST_ARCH_64_BIT 1
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#else
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#define V8_HOST_ARCH_32_BIT 1
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#endif
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#elif defined(__riscv) || defined(__riscv__)
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#if __riscv_xlen == 64
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#define V8_HOST_ARCH_RISCV64 1
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#define V8_HOST_ARCH_64_BIT 1
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#else
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#error "Cannot detect Riscv's bitwidth"
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#endif
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#else
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#error "Host architecture was not detected as supported by v8"
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#endif
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// Target architecture detection. This corresponds to the architecture for which
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// V8's JIT will generate code (the last stage of the canadian cross-compiler).
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// The macros may be set externally. If not, detect in the same way as the host
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// architecture, that is, target the native environment as presented by the
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// compiler.
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#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_IA32 && !V8_TARGET_ARCH_ARM && \
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!V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_MIPS && !V8_TARGET_ARCH_MIPS64 && \
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!V8_TARGET_ARCH_PPC && !V8_TARGET_ARCH_PPC64 && !V8_TARGET_ARCH_S390 && \
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!V8_TARGET_ARCH_RISCV64 && !V8_TARGET_ARCH_LOONG64
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#if defined(_M_X64) || defined(__x86_64__)
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#define V8_TARGET_ARCH_X64 1
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#elif defined(_M_IX86) || defined(__i386__)
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#define V8_TARGET_ARCH_IA32 1
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#elif defined(__AARCH64EL__) || defined(_M_ARM64)
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#define V8_TARGET_ARCH_ARM64 1
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#elif defined(__ARMEL__)
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#define V8_TARGET_ARCH_ARM 1
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#elif defined(__mips64)
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#define V8_TARGET_ARCH_MIPS64 1
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#elif defined(__MIPSEB__) || defined(__MIPSEL__)
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#define V8_TARGET_ARCH_MIPS 1
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#elif defined(_ARCH_PPC64)
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#define V8_TARGET_ARCH_PPC64 1
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#elif defined(_ARCH_PPC)
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#define V8_TARGET_ARCH_PPC 1
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#elif defined(__riscv) || defined(__riscv__)
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#if __riscv_xlen == 64
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#define V8_TARGET_ARCH_RISCV64 1
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#endif
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#else
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#error Target architecture was not detected as supported by v8
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#endif
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#endif
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// Determine architecture pointer size.
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#if V8_TARGET_ARCH_IA32
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#define V8_TARGET_ARCH_32_BIT 1
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#elif V8_TARGET_ARCH_X64
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#if !V8_TARGET_ARCH_32_BIT && !V8_TARGET_ARCH_64_BIT
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#if defined(__x86_64__) && __SIZEOF_POINTER__ == 4 // Check for x32.
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#define V8_TARGET_ARCH_32_BIT 1
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#else
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#define V8_TARGET_ARCH_64_BIT 1
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#endif
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#endif
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#elif V8_TARGET_ARCH_ARM
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#define V8_TARGET_ARCH_32_BIT 1
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#elif V8_TARGET_ARCH_ARM64
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#define V8_TARGET_ARCH_64_BIT 1
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#elif V8_TARGET_ARCH_MIPS
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#define V8_TARGET_ARCH_32_BIT 1
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#elif V8_TARGET_ARCH_MIPS64
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#define V8_TARGET_ARCH_64_BIT 1
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#elif V8_TARGET_ARCH_LOONG64
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#define V8_TARGET_ARCH_64_BIT 1
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#elif V8_TARGET_ARCH_PPC
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#define V8_TARGET_ARCH_32_BIT 1
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#elif V8_TARGET_ARCH_PPC64
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#define V8_TARGET_ARCH_64_BIT 1
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#elif V8_TARGET_ARCH_S390
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#if V8_TARGET_ARCH_S390X
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#define V8_TARGET_ARCH_64_BIT 1
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#else
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#define V8_TARGET_ARCH_32_BIT 1
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#endif
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#elif V8_TARGET_ARCH_RISCV64
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#define V8_TARGET_ARCH_64_BIT 1
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#else
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#error Unknown target architecture pointer size
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#endif
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// Check for supported combinations of host and target architectures.
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#if V8_TARGET_ARCH_IA32 && !V8_HOST_ARCH_IA32
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#error Target architecture ia32 is only supported on ia32 host
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#endif
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#if (V8_TARGET_ARCH_X64 && V8_TARGET_ARCH_64_BIT && \
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!((V8_HOST_ARCH_X64 || V8_HOST_ARCH_ARM64) && V8_HOST_ARCH_64_BIT))
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#error Target architecture x64 is only supported on x64 and arm64 host
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#endif
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#if (V8_TARGET_ARCH_X64 && V8_TARGET_ARCH_32_BIT && \
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!(V8_HOST_ARCH_X64 && V8_HOST_ARCH_32_BIT))
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#error Target architecture x32 is only supported on x64 host with x32 support
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#endif
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#if (V8_TARGET_ARCH_ARM && !(V8_HOST_ARCH_IA32 || V8_HOST_ARCH_ARM))
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#error Target architecture arm is only supported on arm and ia32 host
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#endif
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#if (V8_TARGET_ARCH_ARM64 && !(V8_HOST_ARCH_X64 || V8_HOST_ARCH_ARM64))
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#error Target architecture arm64 is only supported on arm64 and x64 host
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#endif
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#if (V8_TARGET_ARCH_MIPS && !(V8_HOST_ARCH_IA32 || V8_HOST_ARCH_MIPS))
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#error Target architecture mips is only supported on mips and ia32 host
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#endif
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#if (V8_TARGET_ARCH_MIPS64 && !(V8_HOST_ARCH_X64 || V8_HOST_ARCH_MIPS64))
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#error Target architecture mips64 is only supported on mips64 and x64 host
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#endif
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#if (V8_TARGET_ARCH_RISCV64 && !(V8_HOST_ARCH_X64 || V8_HOST_ARCH_RISCV64))
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#error Target architecture riscv64 is only supported on riscv64 and x64 host
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#endif
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#if (V8_TARGET_ARCH_LOONG64 && !(V8_HOST_ARCH_X64 || V8_HOST_ARCH_LOONG64))
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#error Target architecture loong64 is only supported on loong64 and x64 host
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#endif
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// Determine architecture endianness.
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#if V8_TARGET_ARCH_IA32
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#define V8_TARGET_LITTLE_ENDIAN 1
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#elif V8_TARGET_ARCH_X64
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#define V8_TARGET_LITTLE_ENDIAN 1
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#elif V8_TARGET_ARCH_ARM
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#define V8_TARGET_LITTLE_ENDIAN 1
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#elif V8_TARGET_ARCH_ARM64
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#define V8_TARGET_LITTLE_ENDIAN 1
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#elif V8_TARGET_ARCH_LOONG64
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#define V8_TARGET_LITTLE_ENDIAN 1
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#elif V8_TARGET_ARCH_MIPS
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#if defined(__MIPSEB__)
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#define V8_TARGET_BIG_ENDIAN 1
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#else
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#define V8_TARGET_LITTLE_ENDIAN 1
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#endif
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#elif V8_TARGET_ARCH_MIPS64
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#if defined(__MIPSEB__) || defined(V8_TARGET_ARCH_MIPS64_BE)
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#define V8_TARGET_BIG_ENDIAN 1
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#else
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#define V8_TARGET_LITTLE_ENDIAN 1
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#endif
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#elif __BIG_ENDIAN__ // FOR PPCGR on AIX
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#define V8_TARGET_BIG_ENDIAN 1
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#elif V8_TARGET_ARCH_PPC_LE
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#define V8_TARGET_LITTLE_ENDIAN 1
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#elif V8_TARGET_ARCH_PPC_BE
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#define V8_TARGET_BIG_ENDIAN 1
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#elif V8_TARGET_ARCH_S390
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#if V8_TARGET_ARCH_S390_LE_SIM
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#define V8_TARGET_LITTLE_ENDIAN 1
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#else
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#define V8_TARGET_BIG_ENDIAN 1
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#endif
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#elif V8_TARGET_ARCH_RISCV64
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#define V8_TARGET_LITTLE_ENDIAN 1
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#else
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#error Unknown target architecture endianness
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#endif
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#undef V8_HAS_CPP_ATTRIBUTE
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#endif // V8CONFIG_H_
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@ -7,59 +7,6 @@
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#include "include/v8config.h"
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// Processor architecture detection. For more info on what's defined, see:
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// http://msdn.microsoft.com/en-us/library/b0084kay.aspx
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// http://www.agner.org/optimize/calling_conventions.pdf
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// or with gcc, run: "echo | gcc -E -dM -"
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#if defined(_M_X64) || defined(__x86_64__)
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#define V8_HOST_ARCH_X64 1
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#if defined(__x86_64__) && __SIZEOF_POINTER__ == 4 // Check for x32.
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#define V8_HOST_ARCH_32_BIT 1
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#else
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#define V8_HOST_ARCH_64_BIT 1
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#endif
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#elif defined(_M_IX86) || defined(__i386__)
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#define V8_HOST_ARCH_IA32 1
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#define V8_HOST_ARCH_32_BIT 1
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#elif defined(__AARCH64EL__) || defined(_M_ARM64)
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#define V8_HOST_ARCH_ARM64 1
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#define V8_HOST_ARCH_64_BIT 1
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#elif defined(__ARMEL__)
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#define V8_HOST_ARCH_ARM 1
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#define V8_HOST_ARCH_32_BIT 1
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#elif defined(__mips64)
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#define V8_HOST_ARCH_MIPS64 1
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#define V8_HOST_ARCH_64_BIT 1
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#elif defined(__MIPSEB__) || defined(__MIPSEL__)
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#define V8_HOST_ARCH_MIPS 1
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#define V8_HOST_ARCH_32_BIT 1
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#elif defined(__loongarch64)
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#define V8_HOST_ARCH_LOONG64 1
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#define V8_HOST_ARCH_64_BIT 1
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#elif defined(__PPC64__) || defined(_ARCH_PPC64)
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#define V8_HOST_ARCH_PPC64 1
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#define V8_HOST_ARCH_64_BIT 1
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#elif defined(__PPC__) || defined(_ARCH_PPC)
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#define V8_HOST_ARCH_PPC 1
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#define V8_HOST_ARCH_32_BIT 1
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#elif defined(__s390__) || defined(__s390x__)
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#define V8_HOST_ARCH_S390 1
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#if defined(__s390x__)
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#define V8_HOST_ARCH_64_BIT 1
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#else
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#define V8_HOST_ARCH_32_BIT 1
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#endif
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#elif defined(__riscv) || defined(__riscv__)
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#if __riscv_xlen == 64
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#define V8_HOST_ARCH_RISCV64 1
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#define V8_HOST_ARCH_64_BIT 1
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#else
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#error "Cannot detect Riscv's bitwidth"
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#endif
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#else
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#error "Host architecture was not detected as supported by v8"
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#endif
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#if defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__) || \
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defined(__ARM_ARCH_7__)
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#define CAN_USE_ARMV7_INSTRUCTIONS 1
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@ -80,147 +27,6 @@
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#endif
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#endif
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// Target architecture detection. This may be set externally. If not, detect
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// in the same way as the host architecture, that is, target the native
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// environment as presented by the compiler.
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#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_IA32 && !V8_TARGET_ARCH_ARM && \
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!V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_MIPS && !V8_TARGET_ARCH_MIPS64 && \
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!V8_TARGET_ARCH_PPC && !V8_TARGET_ARCH_PPC64 && !V8_TARGET_ARCH_S390 && \
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!V8_TARGET_ARCH_RISCV64 && !V8_TARGET_ARCH_LOONG64
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#if defined(_M_X64) || defined(__x86_64__)
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#define V8_TARGET_ARCH_X64 1
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#elif defined(_M_IX86) || defined(__i386__)
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#define V8_TARGET_ARCH_IA32 1
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#elif defined(__AARCH64EL__) || defined(_M_ARM64)
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#define V8_TARGET_ARCH_ARM64 1
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#elif defined(__ARMEL__)
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#define V8_TARGET_ARCH_ARM 1
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#elif defined(__mips64)
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#define V8_TARGET_ARCH_MIPS64 1
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#elif defined(__MIPSEB__) || defined(__MIPSEL__)
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#define V8_TARGET_ARCH_MIPS 1
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#elif defined(_ARCH_PPC64)
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#define V8_TARGET_ARCH_PPC64 1
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#elif defined(_ARCH_PPC)
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#define V8_TARGET_ARCH_PPC 1
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#elif defined(__riscv) || defined(__riscv__)
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#if __riscv_xlen == 64
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#define V8_TARGET_ARCH_RISCV64 1
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#endif
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#else
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#error Target architecture was not detected as supported by v8
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#endif
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#endif
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// Determine architecture pointer size.
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#if V8_TARGET_ARCH_IA32
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#define V8_TARGET_ARCH_32_BIT 1
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#elif V8_TARGET_ARCH_X64
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#if !V8_TARGET_ARCH_32_BIT && !V8_TARGET_ARCH_64_BIT
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#if defined(__x86_64__) && __SIZEOF_POINTER__ == 4 // Check for x32.
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#define V8_TARGET_ARCH_32_BIT 1
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#else
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#define V8_TARGET_ARCH_64_BIT 1
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#endif
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#endif
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#elif V8_TARGET_ARCH_ARM
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#define V8_TARGET_ARCH_32_BIT 1
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#elif V8_TARGET_ARCH_ARM64
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#define V8_TARGET_ARCH_64_BIT 1
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#elif V8_TARGET_ARCH_MIPS
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#define V8_TARGET_ARCH_32_BIT 1
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#elif V8_TARGET_ARCH_MIPS64
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#define V8_TARGET_ARCH_64_BIT 1
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#elif V8_TARGET_ARCH_LOONG64
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#define V8_TARGET_ARCH_64_BIT 1
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#elif V8_TARGET_ARCH_PPC
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#define V8_TARGET_ARCH_32_BIT 1
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#elif V8_TARGET_ARCH_PPC64
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#define V8_TARGET_ARCH_64_BIT 1
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#elif V8_TARGET_ARCH_S390
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#if V8_TARGET_ARCH_S390X
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#define V8_TARGET_ARCH_64_BIT 1
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#else
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#define V8_TARGET_ARCH_32_BIT 1
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#endif
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#elif V8_TARGET_ARCH_RISCV64
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#define V8_TARGET_ARCH_64_BIT 1
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#else
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#error Unknown target architecture pointer size
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#endif
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// Check for supported combinations of host and target architectures.
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#if V8_TARGET_ARCH_IA32 && !V8_HOST_ARCH_IA32
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#error Target architecture ia32 is only supported on ia32 host
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#endif
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#if (V8_TARGET_ARCH_X64 && V8_TARGET_ARCH_64_BIT && \
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!((V8_HOST_ARCH_X64 || V8_HOST_ARCH_ARM64) && V8_HOST_ARCH_64_BIT))
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#error Target architecture x64 is only supported on x64 and arm64 host
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#endif
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#if (V8_TARGET_ARCH_X64 && V8_TARGET_ARCH_32_BIT && \
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!(V8_HOST_ARCH_X64 && V8_HOST_ARCH_32_BIT))
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#error Target architecture x32 is only supported on x64 host with x32 support
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#endif
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#if (V8_TARGET_ARCH_ARM && !(V8_HOST_ARCH_IA32 || V8_HOST_ARCH_ARM))
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#error Target architecture arm is only supported on arm and ia32 host
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#endif
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#if (V8_TARGET_ARCH_ARM64 && !(V8_HOST_ARCH_X64 || V8_HOST_ARCH_ARM64))
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#error Target architecture arm64 is only supported on arm64 and x64 host
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#endif
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#if (V8_TARGET_ARCH_MIPS && !(V8_HOST_ARCH_IA32 || V8_HOST_ARCH_MIPS))
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#error Target architecture mips is only supported on mips and ia32 host
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#endif
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#if (V8_TARGET_ARCH_MIPS64 && !(V8_HOST_ARCH_X64 || V8_HOST_ARCH_MIPS64))
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#error Target architecture mips64 is only supported on mips64 and x64 host
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#endif
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#if (V8_TARGET_ARCH_RISCV64 && !(V8_HOST_ARCH_X64 || V8_HOST_ARCH_RISCV64))
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#error Target architecture riscv64 is only supported on riscv64 and x64 host
|
||||
#endif
|
||||
#if (V8_TARGET_ARCH_LOONG64 && !(V8_HOST_ARCH_X64 || V8_HOST_ARCH_LOONG64))
|
||||
#error Target architecture loong64 is only supported on loong64 and x64 host
|
||||
#endif
|
||||
|
||||
// Determine architecture endianness.
|
||||
#if V8_TARGET_ARCH_IA32
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#elif V8_TARGET_ARCH_X64
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#elif V8_TARGET_ARCH_ARM
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#elif V8_TARGET_ARCH_ARM64
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#elif V8_TARGET_ARCH_LOONG64
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#elif V8_TARGET_ARCH_MIPS
|
||||
#if defined(__MIPSEB__)
|
||||
#define V8_TARGET_BIG_ENDIAN 1
|
||||
#else
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#elif V8_TARGET_ARCH_MIPS64
|
||||
#if defined(__MIPSEB__) || defined(V8_TARGET_ARCH_MIPS64_BE)
|
||||
#define V8_TARGET_BIG_ENDIAN 1
|
||||
#else
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#endif
|
||||
#elif __BIG_ENDIAN__ // FOR PPCGR on AIX
|
||||
#define V8_TARGET_BIG_ENDIAN 1
|
||||
#elif V8_TARGET_ARCH_PPC_LE
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#elif V8_TARGET_ARCH_PPC_BE
|
||||
#define V8_TARGET_BIG_ENDIAN 1
|
||||
#elif V8_TARGET_ARCH_S390
|
||||
#if V8_TARGET_ARCH_S390_LE_SIM
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#else
|
||||
#define V8_TARGET_BIG_ENDIAN 1
|
||||
#endif
|
||||
#elif V8_TARGET_ARCH_RISCV64
|
||||
#define V8_TARGET_LITTLE_ENDIAN 1
|
||||
#else
|
||||
#error Unknown target architecture endianness
|
||||
#endif
|
||||
|
||||
// pthread_jit_write_protect is only available on arm64 Mac.
|
||||
#if defined(V8_OS_MACOS) && defined(V8_HOST_ARCH_ARM64)
|
||||
#define V8_HAS_PTHREAD_JIT_WRITE_PROTECT 1
|
||||
|
||||
@ -43,10 +43,7 @@ constexpr size_t kPageSize = 1 << kPageSizeLog2;
|
||||
constexpr size_t kPageOffsetMask = kPageSize - 1;
|
||||
constexpr size_t kPageBaseMask = ~kPageOffsetMask;
|
||||
|
||||
#if defined(__aarch64__) && defined(V8_OS_MACOS)
|
||||
#if !defined(V8_TARGET_ARCH_ARM64)
|
||||
#error "V8_TARGET_ARCH_ARM64 and __aarch64__ must match"
|
||||
#endif // !defined(V8_TARGET_ARCH_ARM64)
|
||||
#if defined(V8_TARGET_ARCH_ARM64) && defined(V8_OS_MACOS)
|
||||
// No guard pages on ARM64 macOS. This target has 16 kiB pages, meaning that
|
||||
// the guard pages do not protect anything, since there is no inaccessible
|
||||
// region surrounding the allocation.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user