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[wasm-simd][liftoff][ia32][x64] Implement i32x4_dot_i16x8_s

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Implement i32x4.dot_i16x8_s for Liftoff on on ia32 and x64.
ARM implementation will come later.

Bug: v8:10993
Change-Id: I33b859a21b91023b40d8cf7b9fee110b0d148a7c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2477497
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#70583}
This commit is contained in:
Ng Zhi An 2020-10-15 15:05:42 -07:00 committed by Commit Bot
parent 104cf106ef
commit 2bc52ff7d0
6 changed files with 31 additions and 0 deletions
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6
src/wasm/baseline/arm/liftoff-assembler-arm.h
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@ -2921,6 +2921,12 @@ void LiftoffAssembler::emit_i32x4_max_u(LiftoffRegister dst,
liftoff::GetSimd128Register(lhs), liftoff::GetSimd128Register(rhs));
}
void LiftoffAssembler::emit_i32x4_dot_i16x8_s(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "i32x4_dot_i16x8_s");
}
void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst,
LiftoffRegister src) {
vdup(Neon16, liftoff::GetSimd128Register(dst), src.gp());

6
src/wasm/baseline/arm64/liftoff-assembler-arm64.h
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@ -2003,6 +2003,12 @@ void LiftoffAssembler::emit_i32x4_max_u(LiftoffRegister dst,
Umax(dst.fp().V4S(), lhs.fp().V4S(), rhs.fp().V4S());
}
void LiftoffAssembler::emit_i32x4_dot_i16x8_s(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "i32x4_dot_i16x8_s");
}
void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst,
LiftoffRegister src) {
Dup(dst.fp().V8H(), src.gp().W());

7
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
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@ -3584,6 +3584,13 @@ void LiftoffAssembler::emit_i32x4_max_u(LiftoffRegister dst,
this, dst, lhs, rhs, base::Optional<CpuFeature>(SSE4_1));
}
void LiftoffAssembler::emit_i32x4_dot_i16x8_s(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
liftoff::EmitSimdCommutativeBinOp<&Assembler::vpmaddwd, &Assembler::pmaddwd>(
this, dst, lhs, rhs);
}
void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst,
LiftoffRegister src) {
DoubleRegister reg =

2
src/wasm/baseline/liftoff-assembler.h
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@ -940,6 +940,8 @@ class LiftoffAssembler : public TurboAssembler {
LiftoffRegister rhs);
inline void emit_i32x4_max_u(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_i32x4_dot_i16x8_s(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_i64x2_neg(LiftoffRegister dst, LiftoffRegister src);
inline void emit_i64x2_shl(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);

3
src/wasm/baseline/liftoff-compiler.cc
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@ -2758,6 +2758,9 @@ class LiftoffCompiler {
return EmitBinOp<kS128, kS128>(&LiftoffAssembler::emit_i32x4_max_s);
case wasm::kExprI32x4MaxU:
return EmitBinOp<kS128, kS128>(&LiftoffAssembler::emit_i32x4_max_u);
case wasm::kExprI32x4DotI16x8S:
return EmitBinOp<kS128, kS128>(
&LiftoffAssembler::emit_i32x4_dot_i16x8_s);
case wasm::kExprI64x2Neg:
return EmitUnOp<kS128, kS128>(&LiftoffAssembler::emit_i64x2_neg);
case wasm::kExprI64x2Shl:

7
src/wasm/baseline/x64/liftoff-assembler-x64.h
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@ -3204,6 +3204,13 @@ void LiftoffAssembler::emit_i32x4_max_u(LiftoffRegister dst,
this, dst, lhs, rhs, base::Optional<CpuFeature>(SSE4_1));
}
void LiftoffAssembler::emit_i32x4_dot_i16x8_s(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
liftoff::EmitSimdCommutativeBinOp<&Assembler::vpmaddwd, &Assembler::pmaddwd>(
this, dst, lhs, rhs);
}
void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst,
LiftoffRegister src) {
DoubleRegister reg = dst.fp() == src.fp() ? kScratchDoubleReg : dst.fp();