diff --git a/src/compiler/backend/mips/code-generator-mips.cc b/src/compiler/backend/mips/code-generator-mips.cc
index b9bb92c728..4e7b69e45b 100644
--- a/src/compiler/backend/mips/code-generator-mips.cc
+++ b/src/compiler/backend/mips/code-generator-mips.cc
@@ -877,10 +877,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       Register lhs_register = sp;
       uint32_t offset;
       if (ShouldApplyOffsetToStackCheck(instr, &offset)) {
-        lhs_register = i.TempRegister(0);
+        lhs_register = i.TempRegister(1);
         __ Subu(lhs_register, sp, offset);
       }
-      __ Sltu(i.OutputRegister(), i.InputRegister(0), lhs_register);
+      __ Sltu(i.TempRegister(0), i.InputRegister(0), lhs_register);
       break;
     }
     case kArchStackCheckOffset:
@@ -3716,9 +3716,9 @@ void AssembleBranchToLabels(CodeGenerator* gen, TurboAssembler* tasm,
     cc = FlagsConditionToConditionCmp(condition);
     DCHECK((cc == ls) || (cc == hi));
     if (cc == ls) {
-      __ xori(i.OutputRegister(), i.OutputRegister(), 1);
+      __ xori(i.TempRegister(0), i.TempRegister(0), 1);
     }
-    __ Branch(tlabel, ne, i.OutputRegister(), Operand(zero_reg));
+    __ Branch(tlabel, ne, i.TempRegister(0), Operand(zero_reg));
   } else if (instr->arch_opcode() == kMipsCmpS ||
              instr->arch_opcode() == kMipsCmpD) {
     bool predicate;
@@ -4032,7 +4032,7 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
     cc = FlagsConditionToConditionCmp(condition);
     DCHECK((cc == ls) || (cc == hi));
     if (cc == ls) {
-      __ xori(i.OutputRegister(), i.OutputRegister(), 1);
+      __ xori(i.OutputRegister(), i.TempRegister(0), 1);
     }
     return;
   } else {
diff --git a/src/compiler/backend/mips/instruction-selector-mips.cc b/src/compiler/backend/mips/instruction-selector-mips.cc
index 83a9a6f104..b001578b88 100644
--- a/src/compiler/backend/mips/instruction-selector-mips.cc
+++ b/src/compiler/backend/mips/instruction-selector-mips.cc
@@ -1634,11 +1634,12 @@ void InstructionSelector::VisitStackPointerGreaterThan(
   InstructionOperand* const outputs = nullptr;
   const int output_count = 0;
 
+  // TempRegister(0) is used to store the comparison result.
   // Applying an offset to this stack check requires a temp register. Offsets
   // are only applied to the first stack check. If applying an offset, we must
   // ensure the input and temp registers do not alias, thus kUniqueRegister.
-  InstructionOperand temps[] = {g.TempRegister()};
-  const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 1 : 0);
+  InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()};
+  const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 2 : 1);
   const auto register_mode = (kind == StackCheckKind::kJSFunctionEntry)
                                  ? OperandGenerator::kUniqueRegister
                                  : OperandGenerator::kRegister;
diff --git a/src/compiler/backend/mips64/code-generator-mips64.cc b/src/compiler/backend/mips64/code-generator-mips64.cc
index 19a1172c3d..257ef1bca1 100644
--- a/src/compiler/backend/mips64/code-generator-mips64.cc
+++ b/src/compiler/backend/mips64/code-generator-mips64.cc
@@ -839,10 +839,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       Register lhs_register = sp;
       uint32_t offset;
       if (ShouldApplyOffsetToStackCheck(instr, &offset)) {
-        lhs_register = i.TempRegister(0);
+        lhs_register = i.TempRegister(1);
         __ Dsubu(lhs_register, sp, offset);
       }
-      __ Sltu(i.OutputRegister(), i.InputRegister(0), lhs_register);
+      __ Sltu(i.TempRegister(0), i.InputRegister(0), lhs_register);
       break;
     }
     case kArchStackCheckOffset:
@@ -3892,9 +3892,9 @@ void AssembleBranchToLabels(CodeGenerator* gen, TurboAssembler* tasm,
     cc = FlagsConditionToConditionCmp(condition);
     DCHECK((cc == ls) || (cc == hi));
     if (cc == ls) {
-      __ xori(i.OutputRegister(), i.OutputRegister(), 1);
+      __ xori(i.TempRegister(0), i.TempRegister(0), 1);
     }
-    __ Branch(tlabel, ne, i.OutputRegister(), Operand(zero_reg));
+    __ Branch(tlabel, ne, i.TempRegister(0), Operand(zero_reg));
   } else if (instr->arch_opcode() == kMips64CmpS ||
              instr->arch_opcode() == kMips64CmpD) {
     bool predicate;
@@ -4244,7 +4244,7 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
     cc = FlagsConditionToConditionCmp(condition);
     DCHECK((cc == ls) || (cc == hi));
     if (cc == ls) {
-      __ xori(i.OutputRegister(), i.OutputRegister(), 1);
+      __ xori(i.OutputRegister(), i.TempRegister(0), 1);
     }
     return;
   } else {
diff --git a/src/compiler/backend/mips64/instruction-selector-mips64.cc b/src/compiler/backend/mips64/instruction-selector-mips64.cc
index 506eb2c4bf..6d6b487ccd 100644
--- a/src/compiler/backend/mips64/instruction-selector-mips64.cc
+++ b/src/compiler/backend/mips64/instruction-selector-mips64.cc
@@ -2271,11 +2271,12 @@ void InstructionSelector::VisitStackPointerGreaterThan(
   InstructionOperand* const outputs = nullptr;
   const int output_count = 0;
 
+  // TempRegister(0) is used to store the comparison result.
   // Applying an offset to this stack check requires a temp register. Offsets
   // are only applied to the first stack check. If applying an offset, we must
   // ensure the input and temp registers do not alias, thus kUniqueRegister.
-  InstructionOperand temps[] = {g.TempRegister()};
-  const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 1 : 0);
+  InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()};
+  const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 2 : 1);
   const auto register_mode = (kind == StackCheckKind::kJSFunctionEntry)
                                  ? OperandGenerator::kUniqueRegister
                                  : OperandGenerator::kRegister;