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MIPS: [turbofan] Optimize division/modulus by constant.

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Port r24595 (d0f464e)

TEST=cctest,mjsunit,unittests
BUG=
R=paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/651223003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24611 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
balazs.kilvady@imgtec.com 2014-10-14 17:26:14 +00:00
parent b30c09d969
commit 2de468e854
3 changed files with 11 additions and 0 deletions
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3
src/compiler/mips/code-generator-mips.cc
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@ -185,6 +185,9 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
case kMipsMul:
__ Mul(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
break;
case kMipsMulHigh:
__ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
break;
case kMipsDiv:
__ Div(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
break;

1
src/compiler/mips/instruction-codes-mips.h
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@ -17,6 +17,7 @@ namespace compiler {
V(MipsSub) \
V(MipsSubOvf) \
V(MipsMul) \
V(MipsMulHigh) \
V(MipsDiv) \
V(MipsDivU) \
V(MipsMod) \

7
src/compiler/mips/instruction-selector-mips.cc
View File

@ -300,6 +300,13 @@ void InstructionSelector::VisitInt32Mul(Node* node) {
}
void InstructionSelector::VisitInt32MulHigh(Node* node) {
MipsOperandGenerator g(this);
Emit(kMipsMulHigh, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
g.UseRegister(node->InputAt(1)));
}
void InstructionSelector::VisitInt32Div(Node* node) {
MipsOperandGenerator g(this);
Int32BinopMatcher m(node);