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S390: [turbofan] CodeGenerator: Frame setup refactoring

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Port 81a1530e6f

Original commit message:

    Before frame elision, we finalized the frame shape when assembling the
    prologue, which is also when we prepared the frame (saving sp, etc).

    The frame finalization only needs to happen once, and happens to be
    actually a set of idempotent operations. With frame elision, the logic for
    frame finalization was happening every time we constructed the frame.
    Albeit idempotent operations, the code would become hard to maintain.

    This change separates frame shape finalization from frame
    construction. When constructing the CodeGenerator, we finalize the
    frame. Subsequent access is to a const Frame*.

    Also renamed AssemblePrologue to AssembleConstructFrame, as
    suggested in the frame elision CR.

    Separating frame setup gave the opportunity to do away with
    architecture-independent frame aligning (which is something just arm64
    cares about), and also with stack pointer setup (also arm64). Both of
    these happen now at frame finalization on arm64.

R=mtrofin@chromium.org, joransiu@ca.ibm.com, bjaideep@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com

BUG=
LOG=N

Review URL: https://codereview.chromium.org/1903403002

Cr-Commit-Position: refs/heads/master@{#35677}
This commit is contained in:
jyan 2016-04-20 13:37:52 -07:00 committed by Commit bot
parent f32e30240d
commit 2f2b3040b5
1 changed files with 27 additions and 16 deletions
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43
src/compiler/s390/code-generator-s390.cc
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@ -567,8 +567,6 @@ void CodeGenerator::AssembleDeconstructFrame() {
__ LeaveFrame(StackFrame::MANUAL); __ LeaveFrame(StackFrame::MANUAL);
} }
void CodeGenerator::AssembleSetupStackPointer() {}
void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) { void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) {
int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta); int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta);
if (sp_slot_delta > 0) { if (sp_slot_delta > 0) {
@ -1809,7 +1807,29 @@ void CodeGenerator::AssembleDeoptimizerCall(
__ Call(deopt_entry, RelocInfo::RUNTIME_ENTRY); __ Call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
} }
void CodeGenerator::AssemblePrologue() { void CodeGenerator::FinishFrame(Frame* frame) {
CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
const RegList double_saves = descriptor->CalleeSavedFPRegisters();
// Save callee-saved Double registers.
if (double_saves != 0) {
frame->AlignSavedCalleeRegisterSlots();
DCHECK(kNumCalleeSavedDoubles ==
base::bits::CountPopulation32(double_saves));
frame->AllocateSavedCalleeRegisterSlots(kNumCalleeSavedDoubles *
(kDoubleSize / kPointerSize));
}
// Save callee-saved registers.
const RegList saves = descriptor->CalleeSavedRegisters();
if (saves != 0) {
// register save area does not include the fp or constant pool pointer.
const int num_saves = kNumCalleeSaved - 1;
DCHECK(num_saves == base::bits::CountPopulation32(saves));
frame->AllocateSavedCalleeRegisterSlots(num_saves);
}
}
void CodeGenerator::AssembleConstructFrame() {
CallDescriptor* descriptor = linkage()->GetIncomingDescriptor(); CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
if (frame_access_state()->has_frame()) { if (frame_access_state()->has_frame()) {
@ -1826,7 +1846,7 @@ void CodeGenerator::AssemblePrologue() {
} }
} }
int stack_shrink_slots = frame()->GetSpillSlotCount(); int shrink_slots = frame()->GetSpillSlotCount();
if (info()->is_osr()) { if (info()->is_osr()) {
// TurboFan OSR-compiled functions cannot be entered directly. // TurboFan OSR-compiled functions cannot be entered directly.
__ Abort(kShouldNotDirectlyEnterOsrFunction); __ Abort(kShouldNotDirectlyEnterOsrFunction);
@ -1837,15 +1857,12 @@ void CodeGenerator::AssemblePrologue() {
// remaining stack slots. // remaining stack slots.
if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --"); if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
osr_pc_offset_ = __ pc_offset(); osr_pc_offset_ = __ pc_offset();
stack_shrink_slots -= OsrHelper(info()).UnoptimizedFrameSlots(); shrink_slots -= OsrHelper(info()).UnoptimizedFrameSlots();
} }
const RegList double_saves = descriptor->CalleeSavedFPRegisters(); const RegList double_saves = descriptor->CalleeSavedFPRegisters();
if (double_saves != 0) { if (shrink_slots > 0) {
stack_shrink_slots += frame()->AlignSavedCalleeRegisterSlots(); __ lay(sp, MemOperand(sp, -shrink_slots * kPointerSize));
}
if (stack_shrink_slots > 0) {
__ lay(sp, MemOperand(sp, -stack_shrink_slots * kPointerSize));
} }
// Save callee-saved Double registers. // Save callee-saved Double registers.
@ -1853,8 +1870,6 @@ void CodeGenerator::AssemblePrologue() {
__ MultiPushDoubles(double_saves); __ MultiPushDoubles(double_saves);
DCHECK(kNumCalleeSavedDoubles == DCHECK(kNumCalleeSavedDoubles ==
base::bits::CountPopulation32(double_saves)); base::bits::CountPopulation32(double_saves));
frame()->AllocateSavedCalleeRegisterSlots(kNumCalleeSavedDoubles *
(kDoubleSize / kPointerSize));
} }
// Save callee-saved registers. // Save callee-saved registers.
@ -1862,10 +1877,6 @@ void CodeGenerator::AssemblePrologue() {
if (saves != 0) { if (saves != 0) {
__ MultiPush(saves); __ MultiPush(saves);
// register save area does not include the fp or constant pool pointer. // register save area does not include the fp or constant pool pointer.
const int num_saves =
kNumCalleeSaved - 1 - (FLAG_enable_embedded_constant_pool ? 1 : 0);
DCHECK(num_saves == base::bits::CountPopulation32(saves));
frame()->AllocateSavedCalleeRegisterSlots(num_saves);
} }
} }