[loong64][mips64][turbofan] Implement ChangeInt32ToInt64
After TruncateInt64ToInt32 elided, ChangeInt32ToInt64 must be implemented to convert int32 to int64. This is a temporary fix for crrev.com/c/4100664, and does not fix all problems. Change-Id: Iece6f5753c775bd59354e34926fb1eff1506eb6a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/4206968 Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn> Auto-Submit: Liu Yu <liuyu@loongson.cn> Reviewed-by: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn> Cr-Commit-Position: refs/heads/main@{#85607}
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@ -1398,21 +1398,33 @@ void InstructionSelector::VisitBitcastWord32ToWord64(Node* node) {
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}
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void InstructionSelector::VisitChangeInt32ToInt64(Node* node) {
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// On LoongArch64, int32 values should all be sign-extended to 64-bit, so
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// no need to sign-extend them here.
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// But when call to a host function in simulator, if the function return an
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// int32 value, the simulator do not sign-extend to int64, because in
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// simulator we do not know the function whether return an int32 or int64.
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#ifdef USE_SIMULATOR
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Node* value = node->InputAt(0);
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if (value->opcode() == IrOpcode::kCall) {
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if ((value->opcode() == IrOpcode::kLoad ||
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value->opcode() == IrOpcode::kLoadImmutable) &&
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CanCover(node, value)) {
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// Generate sign-extending load.
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LoadRepresentation load_rep = LoadRepresentationOf(value->op());
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InstructionCode opcode = kArchNop;
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switch (load_rep.representation()) {
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case MachineRepresentation::kBit: // Fall through.
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case MachineRepresentation::kWord8:
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opcode = load_rep.IsUnsigned() ? kLoong64Ld_bu : kLoong64Ld_b;
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break;
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case MachineRepresentation::kWord16:
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opcode = load_rep.IsUnsigned() ? kLoong64Ld_hu : kLoong64Ld_h;
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break;
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case MachineRepresentation::kWord32:
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opcode = kLoong64Ld_w;
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break;
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default:
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UNREACHABLE();
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}
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EmitLoad(this, value, opcode, node);
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} else {
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Loong64OperandGenerator g(this);
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Emit(kLoong64Sll_w, g.DefineAsRegister(node), g.UseRegister(value),
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g.TempImmediate(0));
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return;
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}
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#endif
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EmitIdentity(node);
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}
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bool InstructionSelector::ZeroExtendsWord32ToWord64NoPhis(Node* node) {
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@ -1481,21 +1481,33 @@ void InstructionSelector::VisitBitcastWord32ToWord64(Node* node) {
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}
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void InstructionSelector::VisitChangeInt32ToInt64(Node* node) {
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// On MIPS64, int32 values should all be sign-extended to 64-bit, so
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// no need to sign-extend them here.
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// But when call to a host function in simulator, if the function return an
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// int32 value, the simulator do not sign-extend to int64, because in
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// simulator we do not know the function whether return an int32 or int64.
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#ifdef USE_SIMULATOR
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Node* value = node->InputAt(0);
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if (value->opcode() == IrOpcode::kCall) {
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if ((value->opcode() == IrOpcode::kLoad ||
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value->opcode() == IrOpcode::kLoadImmutable) &&
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CanCover(node, value)) {
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// Generate sign-extending load.
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LoadRepresentation load_rep = LoadRepresentationOf(value->op());
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InstructionCode opcode = kArchNop;
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switch (load_rep.representation()) {
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case MachineRepresentation::kBit: // Fall through.
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case MachineRepresentation::kWord8:
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opcode = load_rep.IsUnsigned() ? kMips64Lbu : kMips64Lb;
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break;
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case MachineRepresentation::kWord16:
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opcode = load_rep.IsUnsigned() ? kMips64Lhu : kMips64Lh;
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break;
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case MachineRepresentation::kWord32:
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opcode = kMips64Lw;
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break;
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default:
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UNREACHABLE();
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}
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EmitLoad(this, value, opcode, node);
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} else {
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Mips64OperandGenerator g(this);
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Emit(kMips64Shl, g.DefineAsRegister(node), g.UseRegister(value),
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g.TempImmediate(0));
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return;
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}
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#endif
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EmitIdentity(node);
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}
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bool InstructionSelector::ZeroExtendsWord32ToWord64NoPhis(Node* node) {
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