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[turbofan][ia32] Remove the kIA32PeekFloat32 and kIA32PeekFloat64 instructions

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Instead of these two instructions I generalize the kIA32Peek instruction.

R=bmeurer@chromium.org

Change-Id: I4bc48ac95dffd6e33de47a6aee9a13a1d64f78e0
Reviewed-on: https://chromium-review.googlesource.com/839766
Reviewed-by: Benedikt Meurer <bmeurer@chromium.org>
Commit-Queue: Andreas Haas <ahaas@chromium.org>
Cr-Commit-Position: refs/heads/master@{#50292}
This commit is contained in:
Andreas Haas 2017-12-21 14:12:16 +01:00 committed by Commit Bot
parent 3caf0f20b6
commit 3423516972
4 changed files with 23 additions and 31 deletions
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26
src/compiler/ia32/code-generator-ia32.cc
View File

@ -1804,25 +1804,21 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
}
break;
}
case kIA32PeekFloat32: {
int reverse_slot = MiscField::decode(instr->opcode());
int offset =
FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot);
__ movss(i.OutputFloatRegister(), Operand(ebp, offset));
break;
}
case kIA32PeekFloat64: {
int reverse_slot = MiscField::decode(instr->opcode());
int offset =
FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot);
__ movsd(i.OutputDoubleRegister(), Operand(ebp, offset));
break;
}
case kIA32Peek: {
int reverse_slot = MiscField::decode(instr->opcode());
int offset =
FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot);
__ mov(i.OutputRegister(), Operand(ebp, offset));
if (instr->OutputAt(0)->IsFPRegister()) {
LocationOperand* op = LocationOperand::cast(instr->OutputAt(0));
if (op->representation() == MachineRepresentation::kFloat64) {
__ movsd(i.OutputDoubleRegister(), Operand(ebp, offset));
} else {
DCHECK_EQ(MachineRepresentation::kFloat32, op->representation());
__ movss(i.OutputFloatRegister(), Operand(ebp, offset));
}
} else {
__ mov(i.OutputRegister(), Operand(ebp, offset));
}
break;
}
case kSSEF32x4Splat: {

2
src/compiler/ia32/instruction-codes-ia32.h
View File

@ -112,8 +112,6 @@ namespace compiler {
V(IA32PushFloat64) \
V(IA32Poke) \
V(IA32Peek) \
V(IA32PeekFloat32) \
V(IA32PeekFloat64) \
V(IA32StackCheck) \
V(SSEF32x4Splat) \
V(AVXF32x4Splat) \

2
src/compiler/ia32/instruction-scheduler-ia32.cc
View File

@ -264,8 +264,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kIA32StackCheck:
case kIA32Peek:
case kIA32PeekFloat32:
case kIA32PeekFloat64:
return kIsLoadOperation;
case kIA32Push:

24
src/compiler/ia32/instruction-selector-ia32.cc
View File

@ -1087,22 +1087,22 @@ void InstructionSelector::EmitPrepareResults(ZoneVector<PushParameter>* results,
int reverse_slot = 0;
for (PushParameter output : *results) {
if (!output.location.IsCallerFrameSlot()) continue;
reverse_slot += output.location.GetSizeInPointers();
++reverse_slot;
// Skip any alignment holes in nodes.
if (output.node == nullptr) continue;
DCHECK(!descriptor->IsCFunctionCall());
if (output.location.GetType() == MachineType::Float32()) {
MarkAsFloat32(output.node);
InstructionOperand result = g.DefineAsRegister(output.node);
Emit(kIA32PeekFloat32 | MiscField::encode(reverse_slot), result);
} else if (output.location.GetType() == MachineType::Float64()) {
MarkAsFloat64(output.node);
InstructionOperand result = g.DefineAsRegister(output.node);
Emit(kIA32PeekFloat64 | MiscField::encode(reverse_slot - 1), result);
} else {
if (output.node != nullptr) {
DCHECK(!descriptor->IsCFunctionCall());
if (output.location.GetType() == MachineType::Float32()) {
MarkAsFloat32(output.node);
} else if (output.location.GetType() == MachineType::Float64()) {
MarkAsFloat64(output.node);
}
InstructionOperand result = g.DefineAsRegister(output.node);
Emit(kIA32Peek | MiscField::encode(reverse_slot), result);
}
if (output.location.GetType() == MachineType::Float64()) {
// Float64 require an implicit second slot.
++reverse_slot;
}
}
}