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[wasm-simd][liftoff] Implement subset of v128.const

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Partial implementation of v128.const, only the optimized case for all 0s
and all 1s. The other cases bailout to TurboFan for now, and will be
added in subsequent patches.

Bug: v8:9909
Change-Id: I3240c1c5f4259c45d51edca00fec37047bc1b3a5
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2284212
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#68772}
This commit is contained in:
Ng Zhi An 2020-07-09 15:02:12 -07:00 committed by Commit Bot
parent 3fec0d9132
commit 34871eddc0
6 changed files with 36 additions and 1 deletions
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5
src/wasm/baseline/arm/liftoff-assembler-arm.h
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@ -3269,6 +3269,11 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
liftoff::F64x2Compare(this, dst, lhs, rhs, le);
}
void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
const uint8_t imms[16]) {
bailout(kSimd, "s128.const");
}
void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
vmvn(liftoff::GetSimd128Register(dst), liftoff::GetSimd128Register(src));
}

5
src/wasm/baseline/arm64/liftoff-assembler-arm64.h
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@ -2331,6 +2331,11 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
Fcmge(dst.fp().V2D(), rhs.fp().V2D(), lhs.fp().V2D());
}
void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
const uint8_t imms[16]) {
bailout(kSimd, "s128.const");
}
void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
Mvn(dst.fp().V16B(), src.fp().V16B());
}

5
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
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@ -2832,6 +2832,11 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
rhs);
}
void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
const uint8_t imms[16]) {
bailout(kSimd, "s128.const");
}
void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
if (dst.fp() != src.fp()) {
Pcmpeqd(dst.fp(), dst.fp());

1
src/wasm/baseline/liftoff-assembler.h
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@ -818,6 +818,7 @@ class LiftoffAssembler : public TurboAssembler {
LiftoffRegister rhs);
inline void emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]);
inline void emit_s128_not(LiftoffRegister dst, LiftoffRegister src);
inline void emit_s128_and(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);

16
src/wasm/baseline/liftoff-compiler.cc
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@ -2949,7 +2949,21 @@ class LiftoffCompiler {
void S128Const(FullDecoder* decoder, const Simd128Immediate<validate>& imm,
Value* result) {
unsupported(decoder, kSimd, "simd");
constexpr RegClass result_rc = reg_class_for(ValueType::kS128);
LiftoffRegister dst = __ GetUnusedRegister(result_rc, {});
bool all_zeroes = std::all_of(std::begin(imm.value), std::end(imm.value),
[](uint8_t v) { return v == 0; });
bool all_ones = std::all_of(std::begin(imm.value), std::end(imm.value),
[](uint8_t v) { return v == 0xff; });
if (all_zeroes) {
__ LiftoffAssembler::emit_s128_xor(dst, dst, dst);
} else if (all_ones) {
// Any SIMD eq will work, i32x4 is efficient on all archs.
__ LiftoffAssembler::emit_i32x4_eq(dst, dst, dst);
} else {
__ LiftoffAssembler::emit_s128_const(dst, imm.value);
}
__ PushRegister(kWasmS128, dst);
}
void Simd8x16ShuffleOp(FullDecoder* decoder,

5
src/wasm/baseline/x64/liftoff-assembler-x64.h
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@ -2547,6 +2547,11 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
rhs);
}
void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
const uint8_t imms[16]) {
bailout(kSimd, "s128.const");
}
void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
if (dst.fp() != src.fp()) {
Pcmpeqd(dst.fp(), dst.fp());