Add multiplication and division to x64 assembler. Add emit_modrm() function.
Review URL: http://codereview.chromium.org/119078 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2098 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
whesse@chromium.org
parent
92c17c34de
commit
34de62698c
@ -342,7 +342,7 @@ void Assembler::emit_operand(int rm, const Operand& adr) {
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const unsigned length = adr.len_;
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ASSERT(length > 0);
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// Emit updated ModRM byte containing the given register.
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// Emit updated ModR/M byte containing the given register.
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pc_[0] = (adr.buf_[0] & ~0x38) | (rm << 3);
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// Emit the rest of the encoded operand.
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@ -367,7 +367,7 @@ void Assembler::arithmetic_op(byte opcode, Register dst, Register src) {
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last_pc_ = pc_;
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emit_rex_64(dst, src);
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emit(opcode);
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emit(0xC0 | (dst.code() & 0x7) << 3 | (src.code() & 0x7));
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emit_modrm(dst, src);
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}
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void Assembler::immediate_arithmetic_op(byte subcode,
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@ -378,14 +378,14 @@ void Assembler::immediate_arithmetic_op(byte subcode,
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emit_rex_64(dst);
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if (is_int8(src.value_)) {
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emit(0x83);
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emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
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emit_modrm(subcode, dst);
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emit(src.value_);
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} else if (dst.is(rax)) {
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emit(0x05 | (subcode << 3));
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emitl(src.value_);
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} else {
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emit(0x81);
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emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
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emit_modrm(subcode, dst);
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emitl(src.value_);
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}
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}
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@ -415,11 +415,11 @@ void Assembler::shift(Register dst, Immediate shift_amount, int subcode) {
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if (shift_amount.value_ == 1) {
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emit_rex_64(dst);
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emit(0xD1);
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emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
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emit_modrm(subcode, dst);
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} else {
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emit_rex_64(dst);
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emit(0xC1);
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emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
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emit_modrm(subcode, dst);
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emit(shift_amount.value_);
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}
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}
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@ -430,7 +430,7 @@ void Assembler::shift(Register dst, int subcode) {
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last_pc_ = pc_;
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emit_rex_64(dst);
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emit(0xD3);
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emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
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emit_modrm(subcode, dst);
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}
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@ -479,11 +479,11 @@ void Assembler::call(Register adr) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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// Opcode: FF /2 r64
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if (!is_uint3(adr.code())) {
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if (adr.code() > 7) {
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emit_rex_64(adr);
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}
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emit(0xFF);
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emit(0xD0 | (adr.code() & 0x07));
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emit_modrm(0x2, adr);
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}
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@ -509,7 +509,7 @@ void Assembler::dec(Register dst) {
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last_pc_ = pc_;
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emit_rex_64(dst);
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emit(0xFF);
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emit(0xC8 | (dst.code() & 0x7));
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emit_modrm(0x1, dst);
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}
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@ -538,12 +538,47 @@ void Assembler::hlt() {
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}
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void Assembler::idiv(Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(src);
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emit(0xF7);
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emit_modrm(0x7, src);
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}
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void Assembler::imul(Register dst, const Operand& src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(dst, src);
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emit(0x0F);
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emit(0xAF);
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emit_operand(dst, src);
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}
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void Assembler::imul(Register dst, Register src, Immediate imm) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(dst, src);
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if (is_int8(imm.value_)) {
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emit(0x6B);
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emit_modrm(dst, src);
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emit(imm.value_);
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} else {
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emit(0x69);
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emit_modrm(dst, src);
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emitl(imm.value_);
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}
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}
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void Assembler::inc(Register dst) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(dst);
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emit(0xFF);
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emit(0xC0 | (dst.code() & 0x7));
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emit_modrm(0x0, dst);
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}
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@ -634,11 +669,11 @@ void Assembler::jmp(Register target) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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// Opcode FF/4 r64
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if (!is_uint3(target.code())) {
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if (target.code() > 7) {
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emit_rex_64(target);
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}
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emit(0xFF);
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emit(0xE0 | target.code() & 0x07);
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emit_modrm(0x4, target);
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}
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@ -658,6 +693,31 @@ void Assembler::leave() {
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}
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void Assembler::movb(Register dst, const Operand& src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_32(dst, src);
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emit(0x8A);
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emit_operand(dst, src);
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}
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void Assembler::movb(Register dst, Immediate imm) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_32(dst);
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emit(0xC6);
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emit_modrm(0x0, dst);
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emit(imm.value_);
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}
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void Assembler::movb(const Operand& dst, Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_32(src, dst);
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emit(0x88);
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emit_operand(src, dst);
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}
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void Assembler::movl(Register dst, const Operand& src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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@ -672,7 +732,7 @@ void Assembler::movl(Register dst, Register src) {
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last_pc_ = pc_;
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emit_optional_rex_32(dst, src);
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emit(0x8B);
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emit(0xC0 | (dst.code() & 0x7) << 3 | (src.code() & 0x7));
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emit_modrm(dst, src);
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}
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@ -690,7 +750,7 @@ void Assembler::movl(Register dst, Immediate value) {
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last_pc_ = pc_;
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emit_optional_rex_32(dst);
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emit(0xC7);
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emit(0xC0 | (dst.code() & 0x7));
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emit_modrm(0x0, dst);
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emit(value); // Only 32-bit immediates are possible, not 8-bit immediates.
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}
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@ -709,7 +769,7 @@ void Assembler::movq(Register dst, Register src) {
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last_pc_ = pc_;
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emit_rex_64(dst, src);
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emit(0x8B);
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emit(0xC0 | (dst.code() & 0x7) << 3 | (src.code() & 0x7));
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emit_modrm(dst, src);
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}
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@ -718,7 +778,7 @@ void Assembler::movq(Register dst, Immediate value) {
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last_pc_ = pc_;
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emit_rex_64(dst);
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emit(0xC7);
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emit(0xC0 | (dst.code() & 0x7));
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emit_modrm(0x0, dst);
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emit(value); // Only 32-bit immediates are possible, not 8-bit immediates.
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}
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@ -727,7 +787,7 @@ void Assembler::movq(Register dst, int64_t value, RelocInfo::Mode rmode) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(dst);
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emit(0xB8 | (dst.code() & 0x7));
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emit(0xB8 | (dst.code() & 0x7)); // Not a ModR/M byte.
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emitq(value, rmode);
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}
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@ -741,12 +801,21 @@ void Assembler::movq(const Operand& dst, Register src) {
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}
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void Assembler::mul(Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(src);
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emit(0xF7);
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emit_modrm(0x4, src);
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}
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void Assembler::neg(Register dst) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(dst);
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emit(0xF7);
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emit(0xC0 | (0x3 << 3) | (dst.code() & 0x7));
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emit_modrm(0x3, dst);
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}
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@ -771,7 +840,7 @@ void Assembler::not_(Register dst) {
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last_pc_ = pc_;
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emit_rex_64(dst);
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emit(0xF7);
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emit(0xC0 | (0x2 << 3) | (dst.code() & 0x7));
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emit_modrm(0x2, dst);
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}
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@ -874,7 +943,7 @@ void Assembler::nop(int n) {
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void Assembler::pop(Register dst) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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if (dst.code() & 0x8) {
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if (dst.code() > 7) {
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emit_rex_64(dst);
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}
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emit(0x58 | (dst.code() & 0x7));
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@ -900,7 +969,7 @@ void Assembler::popfq() {
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void Assembler::push(Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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if (src.code() & 0x8) {
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if (src.code() > 7) {
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emit_rex_64(src);
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}
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emit(0x50 | (src.code() & 0x7));
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@ -943,11 +1012,11 @@ void Assembler::rcl(Register dst, uint8_t imm8) {
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if (imm8 == 1) {
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emit_rex_64(dst);
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emit(0xD1);
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emit(0xD0 | (dst.code() & 0x7));
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emit_modrm(0x2, dst);
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} else {
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emit_rex_64(dst);
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emit(0xC1);
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emit(0xD0 | (dst.code() & 0x7));
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emit_modrm(0x2, dst);
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emit(imm8);
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}
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}
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@ -967,6 +1036,26 @@ void Assembler::ret(int imm16) {
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}
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void Assembler::shld(Register dst, Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(src, dst);
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emit(0x0F);
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emit(0xA5);
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emit_modrm(src, dst);
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}
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void Assembler::shrd(Register dst, Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(src, dst);
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emit(0x0F);
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emit(0xAD);
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emit_modrm(src, dst);
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}
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void Assembler::xchg(Register dst, Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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@ -977,7 +1066,7 @@ void Assembler::xchg(Register dst, Register src) {
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} else {
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emit_rex_64(src, dst);
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emit(0x87);
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emit(0xC0 | (src.code() & 0x7) << 3 | (dst.code() & 0x7));
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emit_modrm(src, dst);
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}
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}
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@ -989,11 +1078,12 @@ void Assembler::testb(Register reg, Immediate mask) {
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emit(0xA8);
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emit(mask);
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} else {
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if (reg.code() & 0x8) {
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emit_rex_32(rax, reg);
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if (reg.code() > 3) {
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// Register is not one of al, bl, cl, dl. Its encoding needs REX.
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emit_rex_32(reg);
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}
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emit(0xF6);
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emit(0xC0 | (reg.code() & 0x3));
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emit_modrm(0x0, reg);
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emit(mask.value_); // Low byte emitted.
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}
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}
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@ -1018,7 +1108,7 @@ void Assembler::testl(Register reg, Immediate mask) {
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} else {
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emit_optional_rex_32(rax, reg);
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emit(0xF7);
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emit(0xC0 | (reg.code() & 0x3));
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emit_modrm(0x0, reg);
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emit(mask);
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}
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}
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@ -1034,6 +1124,24 @@ void Assembler::testl(const Operand& op, Immediate mask) {
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}
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void Assembler::testq(const Operand& op, Register reg) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(reg, op);
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emit(0x85);
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emit_operand(reg, op);
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}
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void Assembler::testq(Register dst, Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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emit_rex_64(dst, src);
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emit(0x85);
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emit_modrm(dst, src);
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}
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// Relocation information implementations
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void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
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@ -270,7 +270,7 @@ class Operand BASE_EMBEDDED {
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unsigned int len_;
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RelocInfo::Mode rmode_;
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// Set the ModRM byte without an encoded 'reg' register. The
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// Set the ModR/M byte without an encoded 'reg' register. The
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// register is encoded later as part of the emit_operand operation.
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// set_modrm can be called before or after set_sib and set_disp*.
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inline void set_modrm(int mod, Register rm);
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@ -417,7 +417,7 @@ class Assembler : public Malloced {
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// Moves
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void movb(Register dst, const Operand& src);
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void movb(const Operand& dst, int8_t imm8);
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void movb(Register dst, Immediate imm);
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void movb(const Operand& dst, Register src);
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void movl(Register dst, Register src);
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@ -538,16 +538,20 @@ class Assembler : public Malloced {
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// Sign-extends rax into rdx:rax.
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void cqo();
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// Divide rdx:rax by src. Quotient in rax, remainder in rdx.
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void idiv(Register src);
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void imul(Register dst, Register src);
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void imul(Register dst, const Operand& src);
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void imul(Register dst, Register src, int32_t imm32);
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// Performs the operation dst = src * imm.
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void imul(Register dst, Register src, Immediate imm);
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void inc(Register dst);
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void inc(const Operand& dst);
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void lea(Register dst, const Operand& src);
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// Multiply rax by src, put the result in rdx:rax.
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void mul(Register src);
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void neg(Register dst);
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@ -579,11 +583,11 @@ class Assembler : public Malloced {
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void rcl(Register dst, uint8_t imm8);
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void sbb(Register dst, const Operand& src);
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// Shifts dst:src left by cl bits, affecting only dst.
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void shld(Register dst, Register src);
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void shld(Register dst, const Operand& src);
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void shrd(Register dst, const Operand& src);
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// Shifts src:dst right by cl bits, affecting only dst.
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void shrd(Register dst, Register src);
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// Shifts dst right, duplicating sign bit, by shift_amount bits.
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// Shifting by 1 is handled efficiently.
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@ -636,6 +640,8 @@ class Assembler : public Malloced {
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void testb(const Operand& op, Immediate mask);
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void testl(Register reg, Immediate mask);
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void testl(const Operand& op, Immediate mask);
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void testq(const Operand& op, Register reg);
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void testq(Register dst, Register src);
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void xor_(Register dst, Register src) {
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arithmetic_op(0x33, dst, src);
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@ -898,7 +904,7 @@ class Assembler : public Malloced {
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// High bit of base goes to REX.B and high bit of index to REX.X.
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// REX.W and REX.R are clear.
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inline void emit_rex_32(const Operand &);
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inline void emit_rex_32(const Operand& op);
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// High bit of reg goes to REX.R, high bit of rm_reg goes to REX.B.
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// REX.W is cleared. If no REX bits are set, no byte is emitted.
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@ -919,26 +925,38 @@ class Assembler : public Malloced {
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inline void emit_optional_rex_32(const Operand& op);
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// Emit the Mod/RM byte, and optionally the SIB byte and
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// Emit the ModR/M byte, and optionally the SIB byte and
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// 1- or 4-byte offset for a memory operand. Also encodes
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// the second operand of the operation, a register or operation
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// subcode, into the Mod/RM byte.
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// subcode, into the reg field of the ModR/M byte.
|
||||
void emit_operand(Register reg, const Operand& adr) {
|
||||
emit_operand(reg.code() & 0x07, adr);
|
||||
}
|
||||
|
||||
// Emit the Mod/RM byte, and optionally the SIB byte and
|
||||
// Emit the ModR/M byte, and optionally the SIB byte and
|
||||
// 1- or 4-byte offset for a memory operand. Also used to encode
|
||||
// a three-byte opcode extension into the Mod/RM byte.
|
||||
// a three-bit opcode extension into the ModR/M byte.
|
||||
void emit_operand(int rm, const Operand& adr);
|
||||
|
||||
// Emit a ModR/M byte with registers coded in the reg and rm_reg fields.
|
||||
void emit_modrm(Register reg, Register rm_reg) {
|
||||
emit(0xC0 | (reg.code() & 0x7) << 3 | (rm_reg.code() & 0x7));
|
||||
}
|
||||
|
||||
// Emit a ModR/M byte with an operation subcode in the reg field and
|
||||
// a register in the rm_reg field.
|
||||
void emit_modrm(int code, Register rm_reg) {
|
||||
ASSERT((code & ~0x7) == 0);
|
||||
emit(0xC0 | (code & 0x7) << 3 | (rm_reg.code() & 0x7));
|
||||
}
|
||||
|
||||
// Emit the code-object-relative offset of the label's position
|
||||
inline void emit_code_relative_offset(Label* label);
|
||||
|
||||
// Emit machine code for one of the operations ADD, ADC, SUB, SBC,
|
||||
// AND, OR, XOR, or CMP. The encodings of these operations are all
|
||||
// similar, differing just in the opcode or in the reg field of the
|
||||
// Mod/RM byte.
|
||||
// ModR/M byte.
|
||||
void arithmetic_op(byte opcode, Register dst, Register src);
|
||||
void arithmetic_op(byte opcode, Register reg, const Operand& op);
|
||||
void immediate_arithmetic_op(byte subcode, Register dst, Immediate src);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user