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Revert of [x86] Use better left operand heuristic for Float64Add and Float64Mul. (patchset #1 id:1 of https://codereview.chromium.org/958583003/)

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Reason for revert:
Tanks on Atom and Haswell

Original issue's description:
> [x86] Use better left operand heuristic for Float64Add and Float64Mul.
>
> R=dcarney@chromium.org
>
> Committed: https://crrev.com/9da259fb1f4ecfefeb2cf7efbe449d8aa1904032
> Cr-Commit-Position: refs/heads/master@{#26849}

TBR=dcarney@chromium.org
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true

Review URL: https://codereview.chromium.org/972243002

Cr-Commit-Position: refs/heads/master@{#26973}
This commit is contained in:
bmeurer 2015-03-03 11:18:40 -08:00 committed by Commit bot
parent 1604bd46bf
commit 3709b9254e
2 changed files with 16 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
src/compiler/ia32/instruction-selector-ia32.cc
View File

@ -634,15 +634,12 @@ void InstructionSelector::VisitTruncateFloat64ToFloat32(Node* node) {
void InstructionSelector::VisitFloat64Add(Node* node) {
IA32OperandGenerator g(this);
Node* left = node->InputAt(0);
Node* right = node->InputAt(1);
if (g.CanBeBetterLeftOperand(right)) std::swap(left, right);
if (IsSupported(AVX)) {
Emit(kAVXFloat64Add, g.DefineAsRegister(node), g.UseRegister(left),
g.Use(right));
Emit(kAVXFloat64Add, g.DefineAsRegister(node),
g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
} else {
Emit(kSSEFloat64Add, g.DefineSameAsFirst(node), g.UseRegister(left),
g.Use(right));
Emit(kSSEFloat64Add, g.DefineSameAsFirst(node),
g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
}
}
@ -661,15 +658,12 @@ void InstructionSelector::VisitFloat64Sub(Node* node) {
void InstructionSelector::VisitFloat64Mul(Node* node) {
IA32OperandGenerator g(this);
Node* left = node->InputAt(0);
Node* right = node->InputAt(1);
if (g.CanBeBetterLeftOperand(right)) std::swap(left, right);
if (IsSupported(AVX)) {
Emit(kAVXFloat64Mul, g.DefineAsRegister(node), g.UseRegister(left),
g.Use(right));
Emit(kAVXFloat64Mul, g.DefineAsRegister(node),
g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
} else {
Emit(kSSEFloat64Mul, g.DefineSameAsFirst(node), g.UseRegister(left),
g.Use(right));
Emit(kSSEFloat64Mul, g.DefineSameAsFirst(node),
g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
}
}

22
src/compiler/x64/instruction-selector-x64.cc
View File

@ -832,15 +832,12 @@ void InstructionSelector::VisitTruncateInt64ToInt32(Node* node) {
void InstructionSelector::VisitFloat64Add(Node* node) {
X64OperandGenerator g(this);
Node* left = node->InputAt(0);
Node* right = node->InputAt(1);
if (g.CanBeBetterLeftOperand(right)) std::swap(left, right);
if (IsSupported(AVX)) {
Emit(kAVXFloat64Add, g.DefineAsRegister(node), g.UseRegister(left),
g.Use(right));
Emit(kAVXFloat64Add, g.DefineAsRegister(node),
g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
} else {
Emit(kSSEFloat64Add, g.DefineSameAsFirst(node), g.UseRegister(left),
g.Use(right));
Emit(kSSEFloat64Add, g.DefineSameAsFirst(node),
g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
}
}
@ -859,15 +856,12 @@ void InstructionSelector::VisitFloat64Sub(Node* node) {
void InstructionSelector::VisitFloat64Mul(Node* node) {
X64OperandGenerator g(this);
Node* left = node->InputAt(0);
Node* right = node->InputAt(1);
if (g.CanBeBetterLeftOperand(right)) std::swap(left, right);
if (IsSupported(AVX)) {
Emit(kAVXFloat64Mul, g.DefineAsRegister(node), g.UseRegister(left),
g.Use(right));
Emit(kAVXFloat64Mul, g.DefineAsRegister(node),
g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
} else {
Emit(kSSEFloat64Mul, g.DefineSameAsFirst(node), g.UseRegister(left),
g.Use(right));
Emit(kSSEFloat64Mul, g.DefineSameAsFirst(node),
g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
}
}