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Fix bad deoptimization tests for double-to-int conversion.

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Deopted on zero result, not just bad cvttsi2sd conversion.
Add inline floating point result for SHR in Smi TypeRecordingBinaryOpStub.
Small optimizations.

Adding rightshift to case handled by floating point result in type-recording binary op stub.

Review URL: http://codereview.chromium.org/6801040

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7537 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
lrn@chromium.org 2011-04-07 10:44:39 +00:00
parent fa69fd0817
commit 39ac44216e
2 changed files with 38 additions and 30 deletions
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14
src/x64/code-stubs-x64.cc
View File

@ -1110,7 +1110,7 @@ void TypeRecordingBinaryOpStub::GenerateSmiCode(MacroAssembler* masm,
bool generate_inline_heapnumber_results =
(allow_heapnumber_results == ALLOW_HEAPNUMBER_RESULTS) &&
(op_ == Token::ADD || op_ == Token::SUB ||
op_ == Token::MUL || op_ == Token::DIV);
op_ == Token::MUL || op_ == Token::DIV || op_ == Token::SHR);
// Arguments to TypeRecordingBinaryOpStub are in rdx and rax.
Register left = rdx;
@ -1192,7 +1192,7 @@ void TypeRecordingBinaryOpStub::GenerateSmiCode(MacroAssembler* masm,
break;
case Token::SHR:
__ SmiShiftLogicalRight(left, left, right, &not_smis);
__ SmiShiftLogicalRight(left, left, right, &use_fp_on_smis);
__ movq(rax, left);
break;
@ -1203,6 +1203,7 @@ void TypeRecordingBinaryOpStub::GenerateSmiCode(MacroAssembler* masm,
// 5. Emit return of result in rax. Some operations have registers pushed.
__ ret(0);
if (use_fp_on_smis.is_linked()) {
// 6. For some operations emit inline code to perform floating point
// operations on known smis (e.g., if the result of the operation
// overflowed the smi range).
@ -1213,10 +1214,13 @@ void TypeRecordingBinaryOpStub::GenerateSmiCode(MacroAssembler* masm,
__ movq(rax, rbx);
}
if (generate_inline_heapnumber_results) {
__ AllocateHeapNumber(rcx, rbx, slow);
Comment perform_float(masm, "-- Perform float operation on smis");
if (op_ == Token::SHR) {
__ SmiToInteger32(left, left);
__ cvtqsi2sd(xmm0, left);
} else {
FloatingPointHelper::LoadSSE2SmiOperands(masm);
switch (op_) {
case Token::ADD: __ addsd(xmm0, xmm1); break;
@ -1225,10 +1229,12 @@ void TypeRecordingBinaryOpStub::GenerateSmiCode(MacroAssembler* masm,
case Token::DIV: __ divsd(xmm0, xmm1); break;
default: UNREACHABLE();
}
}
__ movsd(FieldOperand(rcx, HeapNumber::kValueOffset), xmm0);
__ movq(rax, rcx);
__ ret(0);
}
}
// 7. Non-smi operands reach the end of the code generated by
// GenerateSmiCode, and fall through to subsequent code,
@ -1437,8 +1443,10 @@ void TypeRecordingBinaryOpStub::GenerateSmiStub(MacroAssembler* masm) {
// number.
GenerateTypeTransition(masm);
if (call_runtime.is_linked()) {
__ bind(&call_runtime);
GenerateCallRuntimeCode(masm);
}
}

4
src/x64/lithium-codegen-x64.cc
View File

@ -3392,7 +3392,7 @@ void LCodeGen::DoDeferredTaggedToI(LTaggedToI* instr) {
__ movsd(xmm0, FieldOperand(input_reg, HeapNumber::kValueOffset));
__ cvttsd2siq(input_reg, xmm0);
__ Set(kScratchRegister, V8_UINT64_C(0x8000000000000000));
__ cmpl(input_reg, kScratchRegister);
__ cmpq(input_reg, kScratchRegister);
DeoptimizeIf(equal, instr->environment());
} else {
// Deoptimize if we don't have a heap number.
@ -3457,7 +3457,7 @@ void LCodeGen::DoDoubleToI(LDoubleToI* instr) {
// the JS bitwise operations.
__ cvttsd2siq(result_reg, input_reg);
__ movq(kScratchRegister, V8_INT64_C(0x8000000000000000), RelocInfo::NONE);
__ cmpl(result_reg, kScratchRegister);
__ cmpq(result_reg, kScratchRegister);
DeoptimizeIf(equal, instr->environment());
} else {
__ cvttsd2si(result_reg, input_reg);